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DesignCon 2025 40 Under 40
DesignCon’s 40 Under 40 program launched in 2024 and provides an opportunity for up-and-coming engineers to further their careers through access to all DesignCon education, including its 15-track conference, as well as access to the expo floor and all networking sessions, including an exclusive networking breakfast for the 40 Under 40 and highly regarded industry mentors and DesignCon speakers. Named through an open nomination and review process, DesignCon celebrates the below next-generation leaders and innovators with its 2025 40 Under 40 program. Find them at the show with an identifying “40 Under 40” badge ribbon.
2025 Winners of 40 Under 40
DesignCon congratulates the 2025 winners of the 40 Under 40 program. These emerging engineers and leaders are the recipients of DesignCon’s full conference education to help further their careers:
- Abhav Sahdev, Masters Student in High-Speed Digital Eng., University of Colorado Boulder
- Abishek Manian, Analog Design Manager & Senior Member of Technical Staff, Texas Instruments
- Anuj Sharma, Founder & CEO, Chip Web Technologies
- Arno van Hoek, Experienced Hardware Engineer, Axis Communications AB
- Asaad Kaadan, Founder, CEO & CTO, Hexabitz
- Ashika Shaji Pandankeril, Staff R&D/Product DVL Engineer System Architecture, TE Connectivity
- Byungjin Bae, Staff Engineer, Samsung Electronics
DesignCon 2024 40 Under 40 Participants
- Cameron Refaee, Analog Design Engineer II, AMD
- Chaofeng Li, Senior Engineer, Qualcomm
- Clay Clemmer, Student, Solano Community College
- Damon Choi, Field Application Engineer, Molex
- Daniel Young, Vice President, Tecdia
- Dhruv Chawla, Field Application Engineer, Molex
- Eduardo Mendes, Digital Design Engineer, Kandou
- Elizabeth Adams, UX Designer, Software Product Design, Tektronix
- Emerald Smith, Founder & CEO, Emerald Consulting Group
- Gajaba Wickramarathne, Field Sales Engineer, RF Associates - North
- Garrett James Baldwin, Layout & Signal Integrity Engineer, Microchip Technology
- Idan Ben Ezra, Hardware & Power Integrity Engineer, Broadcom
- Imam Uddin, IC Systems Engineer, Broadcom
- Jason Ruth, Field Application Engineer, Molex
- Jeremy Cosson-Martin, Member of Technical Staff (MTS), AMD
- Jiahui Tang, Analog Design Engineer, Texas Instruments
- Jinal Shah, Co-founder, Indiesemic
- Kang Xin, Developer, Ericsson
- Lauren Waslick, Director of PCB Design, Newgrange Design
- Liwei Zhao, HSIO System Modeling & Signal Integrity, Astera Labs
- Majid Ahadi Dolatsara, Machine Learning R&D Engineer, Keysight Technologies
- Matthew Haber, Co-Founder & CEO, Cofactr
- Mayuresh Patki, SMTS Systems Design Engineer, AMD
- Michael Derrenbacher, Design Verification Engineer, Texas Instruments
- Naga Suryadevara, Principal EMC Engineer, Stealth AI Startup
- Nicholas Matsumoto, Software Developer, Tektronix
- Nikul Shah, Founder, Indiesemic
- Priya Vemparala Guruswamy, MTS Silicon Design Engineer, SI/PI Applications, AMD
- Qian Ding, Silicon Packaging Design Engineer, Intel PSG (Altera)
- Ramnath Donthi Sanath Kumar, Hardware Engineer, Apple
- Saish Sawant, Staff System Electrical Engineer, ZT Systems
- Scott Witcher, Signal/Power Integrity Technical Staff, Chipletz
- Seunghun Ryu, Ph.D. Student, Korea Advanced Institute of Science and Technology (KAIST)
- Sukanta Dey, Senior EDA Tools Software Engineer, Intel
- William McCaffrey, Digital Hardware Manager, Northrop Grumman
- Xiuguo Jiang, Keysight SE Manager, Keysight
- Yuandong Guo, Senior Member of Technical Staff, SI Engineer, AMD
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