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Smart Event:
Now through March 31, 2023
In Person Event:
#DesignCon
As the electronic industry surges ahead, so does the need for practical insights and solutions to engineer the next generation of products. Enter DesignCon. With technical paper sessions, panels, tutorials, and boot camps spanning 14 tracks, DesignCon’s three-day conference program provides the information you need to solve design challenges now and plan how to improve designs in the future.
Hosted in Silicon Valley, the heart of electronics innovation, DesignCon addresses chip, board, and system challenges facing design engineers. Sessions are provided for all levels of learning, with information for experienced engineers, recent graduates, and everyone in between.
From foundational to applicational, DesignCon conference areas include:
Explore by area of interest with education themes in automotive, autonomous, consumer electronics, Internet of Things (IoT), and medical that will be addressed in multiple conference and theater sessions and represented at exhibits on the expo floor.
Created by our Technical Program Committee (TPC)—an expert panel of more than 95 industry professionals — the DesignCon curriculum is reviewed and updated each year to meet the needs of our ever-evolving industry. DesignCon sets the industry standard for education and technology conferences, offering today's mission-critical information for people designing tomorrow's electronics products.
In 2023, DesignCon once again welcomes Drive World, offering additional conference content to DesignCon All-Access and 2-Day conference attendees in the areas of automotive electronics and intelligence. Session topics include:
Below is a description of each DesignCon 2023 track, including sample topic and session suggestions for Call for Abstracts submissions.
Click on a track name for more details.
Die, chiplet, interposer and packaging decisions can make or break a high-performance interface. This track covers a wide variety of signal and power integrity topics at the die, chiplet, interposer, packaging, and system interface levels. This includes SoC issues, multi-chip integration, chiplet ecosystems, power delivery networks, related noise and jitter mitigation strategies.
Sample topics
Predicting critical aspects of system performance requires various analog and algorithmic modeling abstractions and simulation approaches. This track addresses the creation & validation of component-level models needed for system design and verification.
Sample topics
Integrating photonics or wireless technology into electrical designs presents unique design challenge at chip, board, and system level. This track deals with the issues associated with the design and integration of photonics and wireless ICs, 3D packaging involving optical and electrical interconnects for data communication, emerging wireless and mmWave applications such as 5G/6G, antenna in package integration, and automotive sensor applications such as Lidar or mmWave radar.
Sample topics
Suggested Call-for-Abstracts panel, tutorial & boot camp topics:
Printed circuit board (PCB) materials and fabrication processes and the effects on the electrical properties and performance of the PCB’s modules and packages. This track considers those needs and analyzes the various solution options.
Sample topics
The recent trends in data center, networking, cloud computing, mobile, autonomous driving, machine learning, virtual/augmented reality, and high-performance computing (HPC) present great challenges in I/O interface designs. Interface design also needs to meet increased bandwidth requirements while reducing power, cost, form factor, and maintaining or reducing latency. This track addresses the latest design techniques and signal and power integrity solutions to meet these requirements for various I/O interfaces in areas of Memory interface, 2.5D/3D/SiP and high-speed chip-to-chip interconnects.
Sample topics
Design-oriented modeling simulation and analysis are required for cost-effective power and signal integrity (SI) performance optimization of chip, package, board, and chip+package+board+VRM combinations. This track covers the broad range of topics required to best address those needs for modern microprocessor and digital systems.
Sample topics
Systems designers must resolve a complex set of tradeoffs among package/board/backplane design, choice of connector/materials, SerDes transmit/receive equalization capabilities, and signal coding schemes to get the high-speed serial channels in their system to meet both performance and cost requirements. This track presents system analysis techniques, design studies, and technology/performance data to help system designers make design and technology choices that are as effective as possible.
Sample topics
Suggested panel topics:
Track 8 covers techniques for reducing errors, BER/SER/FLR (bit/symbol/frame loss ratio) through analysis of measurements, simulations, and models of components and systems that experience jitter, noise, crosstalk, ISI, and reflection.
Sample topics
Suggested Call-for-Abstracts panel topic:
High-speed communication systems require increasingly complex signal-processing techniques; including equalization, modulation, synchronization, timing, detection, and FEC methods. This track covers design, modeling, analysis, implementation, and validation of such techniques.
Sample topics
Suggested Call-for-Abstracts panel and/or tutorial topic:
Power Integrity, distribution, and management are essential for system functionality and performance. This track addresses power regulation in terms of power distribution network design, modeling and analysis on boards, packages, and chips, including thermal and reliability considerations. It emphasizes the modeling and analysis of impedance, supply noise, and/or power induced jitter, and their impact on overall system performance.
Sample topics
The electromagnetic compatibility (EMC) and interference (EMI) track aims to cover topics related to the electrical modeling, simulation, design, and validation for product compliance and certification due to EMI/EMC issues. This track raises the awareness and the impact for design and systems engineers in order to mitigate possible issues in the early design stage.
Sample topics
Suggested Call-for-Abstracts tutorial topic:
Advancements in measurement techniques are constantly being made for all aspects of signal and power integrity. This track focuses on the new techniques with an emphasis on understanding the practical limitations and quality of the measurement as well as the accuracies involved when trying to match simulations with measurements.
Sample topics
Measurement Methods for SI, PI, and EMI/EMC
Standards for Measurements
Classic Measurements with Modern Instruments
Hardware Technology and Architecture
Application Specific Measurements for Emerging Technologies
Calibration Algorithms and Quality of Data
Suggested Call-for-Abstracts panel, tutorial & boot camp topics:
Modeling of signals on interconnects with high data rates often requires use or extension of analysis techniques originally developed for RF/microwave systems. This track covers electromagnetic and microwave signal integrity analysis techniques as well as validation with measurements.
Sample topics
Machine-learning algorithms can efficiently derive models for electronics and system design automation and enable fast, accurate design and verification of microelectronic circuits and systems. Unlike traditional programming approaches that have knowledge embedded in complex algorithms and mathematical models, machine learning uses simple algorithms and models, but with numerous parameters, that are intensively trained with complex data sets. This track explores applications where machine-learning approaches provide alternative solutions to traditional methods and offer new solutions to challenging problems. Primary foci will be behavioral models, optimization for electronics design, and system analytics with machine learning techniques.
Sample topics
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