Meet the Technical Program Committee

The DesignCon Technical Program Committee (TPC) is composed of 100 leading experts in all levels of electronic design — chip, board, package, and system. These accomplished engineers and executives from top companies such as Siemens, Intel, Tektronix, Google, Apple, and Amazon Lab126 rigorously review all call-for-paper submissions to develop a conference of the highest quality and industry relevance. The TPC's dedication and expertise helps make DesignCon the nation's premier conference for chip, board, and systems design engineers.

Brice Achkir*, Cisco Fellow/VP Eng.
Joseph Aday*, Senior Member of Technical Staff
Maria Agoston*, Principal Engineer
Richard Allred, Senior Developer, MathWorks
John Andresakis, Director of Business Development
Bruce Archambeault, Retired
Pervez Aziz*, Senior Principal Engineer, Nvidia
Nitin Bhagwath, Principal Signal Integrity Engineer, Micron Technology
Rula Bakleh*, PMTS Silicon Design Engineer
Heidi Barnes*, SI/PI Applications Engineer
Josiah Bartlett*, Principal Engineer in Asics and Technology Organization
Wendem Beyene*, Analog & Mixed Signal Architect, Reality Labs
Gustavo Blando, Senior Hardware SIPI Manager, Amazon AWS
Luis Boluna, Sr. Application Engineer, Keysight Technologies
Justin Butterfield, Principal Signal Integrity Engineer, Micron Technology
Kinger Cai, Sr. Principal Engineer/Director, ARM
John Calvin*, Senior Strategic Planner, Network and Data Center Infrastructure
Robert Carter*, Vice President of Technology and Business Development
Chris Cheng*, Distinguished Engineer
David Choe, Product Engineering Director, Cadence
Antonio Ciccomancini Scogna*, Signal Integrity and EMC Technologist, Western Digital
Davi Correia, Sr. Principal Application Engineer, Cadence Design Systems
Ben Dannan, Chief Technologist, Signal Edge Solutions
O.J. Danzy, Solution Engineering District Manager, Keysight Technologies
Jan De Geest, Senior Staff R&D Signal Integrity Engineer, Amphenol
Jay Diepenbrock, Consultant, SIRF Consultants
Vladimir Dmitriev-Zdorov, Principal Engineer, Siemens EDA
Jason Ellison, Staff Signal Integrity Engineer, TE Connectivity
Shirin Farrahi, Senior Principal Software Engineer, Cadence
Paul Franzon, Cirrus Logic Distinguished Professor, Director of Graduate Programs, NCSU
Sanjeev Gupta*, SI Engineer, Meta Platforms
Sunil Gupta*, SIPI, System Engineer
Robert Haller*, Senior Principal Hardware Engineer
Gert Havermann, Signal Integrity Engineer, HARTING
Allen F. Horn III*, Research Fellow
Rockwell Hsu, Technical Leader, Cisco Systems
Seunghyun Hwang, Principal Engineer, Nvidia
Joungho Kim, Professor, KAIST
Namhoon Kim, Chip Package Design Architect, Open AI
Samuel Kocsis, Director of Standards and Technology, Amphenol
Billy Koo, Principal Engineer, Samsung Electronics
Akhilesh Kumar, Principal R&D Engineer, Ansys
Amit Kumar*, PDK Engineer
Beomtaek Lee, Sr. Principal Engineer, Intel
Mike Li*, Fellow
Zhe Li, Hardware Engineer, Google
Cathy Liu*, Distinguished Engineer
Om Mandhana, Power and Signal Integrity Independent Consultant
Marko Marin*, Technical Account Manager
Jon Martens, Fellow, Anritsu
Mehdi Mechaik*, Distinguished Engineer
Richard Melitz, Distinguished Engineer, Samtec
Ted Mido, Principal R&D Engineer, Synopsys
Akshay Mohan, EM Technology Lead, Amazon Lab126
Jose Moreira*, Senior Staff Engineer
Zhen Mu*, Product Engineering Architect
Riaz Naseer, Sr. Signal Integrity Engineer, Amazon Web Services (AWS)
Alfred P. Neves*, Chief Technologist
Dan Oh, Engineering Director of SI/PI, Product and Test Engineering, Celestial AI
Istvan Novak*, Principal Signal and Power Integrity Engineer
Vishram Pandit*, Power Architect
Jongbae Park, System SI Architect, Apple
Sunil Priyadarshi, Senior Director, Photonics Engineering, AI Hardware Architecture
Pete Pupalaikis, Founding Member and Director of Signal Integrity, Nubis Communications
Kelvin Qiu, Senior Signal Integrity and Power Integrity Engineer, Google
Fangyi Rao, Master Engineer, Keysight Technologies
Lee Ritchey, President, Speeding Edge
Gerardo Romo-Luevano*, Sr. Staff Engineer/Manager
Steve Sandler, Managing Director, Picotest
Venkat Satagopan*, Manager, Signal & Power Integrity
Christian Shuster, Professor, Hamburg University of Technology (TUHH)
Yan Fen Shen, Analog Engineer, Intel
Masashi Shimanouchi, Design Engineer, Altera
Yuriy Shlepnev, President, Simberian
Ben Silva, Analog Engineer, Intel
Bert Simonovich, President, Lamsim Enterprises
Chad Smutzer, Senior Engineer, Mayo Clinic
Mike Steinberger, Consulting Software Engineer, MathWorks
Suresh Subramaniam, CTO, Systems and Adv Packaging, Silitronics Solutions
Madhavan Swaminathan, Department Head and William E. Leonhard Professor, Penn State, College of Engineering
Donald Telian, Owner/Consultant, SiGuys
Lars Thon*, Consultant
Thomas To*, Director
Peter Tomaszewski, Sr. Digital Solutions Engineer, Keysight Technologies
Ambrish Varma*, Sr. Principal Software Engineer
Juan Wang, Senior Staff Engineer, AMD
Scott Wedge, Principal Engineer, Siemens EDA
Hubert Werkmann, Consulting Director, Advantest
Todd Westerhoff, Product Marketing Manager, Siemens EDA
Markus Witte, Systems Engineer, Grimme
Randy Wolff, Product Architect, Siemens EDA
Hsinho Wu*, Design Engineer
Ken Wu, Executive Director, R&R Engineering, 3DIC IP and Advanced Packaging Development, Synopsys
Chris Wyland*, Distinguished Engineer
Kai Xiao, Principal Engineer
Mobashar Yazdani*, Strategic Semiconductor Manager
Zhiping Yang, Adjunct Professor, Missouri University of Science and Technology
Iliya Zamek, Consultant
Geoffrey Zhang, Distinguished Engineer and Supervisor, AMD
Pavel Zivny, Director of Time Domain Instruments, MultiLane
Steven C. Parker, Senior Staff Manager, Architecture DSP, Marvell

*2026 track co-chair