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According to his nominator, Casey has an exemplary track record of developing innovative products and ushering in system level improvements in the industry. He actively engages with customers, industry peers and technologists to enable seamless adoption of next generation technologies in hardware designs and to deliver an exceptional product experience for customers and partners. He is committed to engineering products that solve real-world connectivity problems and do so in a manner that provides customers with actionable fleet diagnostics and ease-of-use features. Casey has been instrumental in guiding the industry through the transition from 10Gbps Ethernet to 800Gbps Ethernet and 8Gbps PCI Express (PCIe) to 32Gbps Compute Express Link (CXL).
Casey is a regular presenter at DesignCon dating back to 2013 when he collaborated with early adopters of 25Gbps Ethernet and co-authored multiple papers and articles along with industry giants like Dell, Huawei, Keysight, Xilinx, Texas Instruments, and more. Since
then, Casey has authored multiple white papers on 50G/100G PAM-4 technologies that discuss practical aspects of Signal Integrity.
Casey is also a leading authority on PCIe technologies and was chosen by PCI-SIG as its Retimer spokesperson. He was deeply involved with co-authoring the Retimer specification that helped the industry to rapidly deploy PCIe 4.0 and PCIe 5.0 solutions and the delivery of the PCIe 6.0 spec.
Casey and his Astera Labs co-founders have brought innovation into the development and testing of chips, being the first semiconductor company to develop complex SoCs entirely on the cloud.
As an active member of PCI-SIG, Casey has consistently contributed towards improving PCIe spec definition. Casey has hosted multiple webinars, authored several often-cited white papers, and produced many videos geared towards educating the industry. Casey is also actively working with the industry to deploy CXL 1.1/2.0 solutions at scale.
Casey actively participates in community volunteering and mentoring programs in San Jose, including volunteering with the San Jose Cathedral Foundation to run a Job Search program. He would like to give back more to the educational and technical community and has already begun by donating the $1,000 Engineer of the Year Award grant he received to the ECE department at the University of Florida.
The four other DesignCon 2024 Engineer of the Year finalists are also experts in their fields: Scott McMorrow, Strategic Technologist at Samtec; Yuriy Shlepnev, President and Founder of Simberian; Bert Simonovich, Signal Integrity and Backplane Consultant at Lamsim Enterprises; and Ransom Stephens, Consulting Senior Scientist for BitifEye Digital Test Solutions GmBH.
We have been pleased to honor these Engineer of the Year Award recipients