Designcon Welcome Letter from Patrick Mannion

Hello,

On behalf of UBM Electronics and Barry Sullivan, IEC director and technical program chair, I would like to invite you to DesignCon 2012, (Jan 30 – Feb 2, Santa Clara, CA). It may be no coincidence that CES, the biggest display of electronic designers’ wizardry is followed so quickly by the conference most devoted to both inspiration as well as deep-dive exploration of the technologies and techniques designers can apply toward forging the next generation of electronic devices and systems. So, get your year design year off to a great start!

This year’s conference is jam packed with something for everyone looking to get the right signal from point A to point B, intact – or at least in a decipherable form – as efficiently and elegantly as possible. From die, through packaging to board and system. So, it’s safe to say that includes just about every engineer out there involved in design and test.

 To that end we have a panels, technical tracks, teardowns, awards (DesignVision and Test & Measurement World’s Best in Test), tutorials, focused educational tracks, breakout sessions, and, of course, happy-hour opportunities to mix with your peers and digest the information, while also visiting a jam-packed exhibit floor. Even at this stage, we’re still trying to squeeze in more, so keep up to date at the main website (www.designcon.com).

To set the tone for each day, we have keynotes from industry visionaries, starting on Monday, January 30th with Joe Macri, corporate vice president and chief technology officer of AMD’s client division. Joe is also chairman of the Jedec JC42.3 Dram Committee and vice chair at large of the Jedec board of directors. His areas of expertise are in CPU, memory and graphics design, with over 20 patents pending or granted. Go to http://bit.ly/x8kkOb for an overview of what’s happening at DesignCon with respect to high-speed memory design.

 On Tuesday, Ilan Spillinger, corporate vice president for hardware architecture for Microsoft will kick off the day. His group leads the Xbox 360 and Kinect architecture and verification, silicon design, hardware incubation, and business development efforts for Microsoft’s Interactive Entertainment Business Hardware division. I’ll be looking forward to catching up with him after his keynote to get more on his vision of gaming, their underlying architectures and the future of sensor-based user interfaces.

Finally, on Wednesday, Prith Banerjee, senior vice president of research at HP and director of HP Labs, the epicenter of the company’s R&D, will give us his take on where the opportunities lie and what HP may be doing about it. Banerjee's own research interests include very-large-scale integration (VLSI) computer-aided design, parallel computing and compilers, and he is the author of about 300 research papers in these areas. His thoughts will be worth tapping into.

In between the keynotes, the technical tracks focus on signal integrity, as usual, but there’s a clear emphasis on 3-D packaging, high-speed interfaces (28 Gbit/s for example), FPGAs, analog design and verification, and pc-board layout. In fact, FPGAs and pc-boards have their own Summits.

For test, it’s not news that high-speed serial buses are causing agita for designers, so along with the regular deep technical sessions devoted to test, Agilent has agreed to step you through the challenges and the testing tools available in high-speed serial design workflow, from design and simulation through turn on, debug, system test and compliance test. The session, “Design and Test Challenges in Next Generation High-Speed Serial Standards (PCIe 3, DDR 3/4, USB 3, FPGA 28 Gbps serial ...)” is a do-not-miss educational opportunity that runs on Monday afternoon and Wednesday morning.

Elsewhere at the conference, I’ll be leading a panel discussion with four of the brightest minds in test to see where the challenges are for you, the designer, and what test companies are doing about them. There’ll also be teardown sessions: iFixit’s Kyle Wiens will be comparing Amazon’s Kindle Fire with Barnes & Noble’s latest Nook, while I’ll be tearing down two tablets (Vizio and gTablet) as well as a Cisco Linksys E3200 router. If you’d like to participate in the discussion on tablet design and the state of Wi-Fi design with 2012 being the year of 802.11ac, let me know and I’ll be sure to include you.

Looking forward to seeing you there!
Patrick Mannion