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Agilent Education Forum

As our Official Host Sponsor, Agilent Technologies will be offering a FREE education workshop at DesignCon 2013. You can REGISTER NOW for this workshop through the DesignCon registration process. It is included with any DesignCon pass including the free Expo Pass.

Challenges and Solutions in Characterizing a 10Gb Device

Date: Monday, January 28, 2013
Time: 1:30pm - 4:30pm
Location: Mission City Ballroom, Room M2

As signal speeds have increased measuring jitter hasn’t become any easier, in fact, it’s become even more difficult. Most designers have been measuring jitter for most of their careers; however, this 3 hour education forum will give expert designers new tips to make more accurate jitter measurements. It will cover how signal parameters (jitter distribution, noise/slew rate, crosstalk, pattern type) and test equipment (clock recovery model, frequency response, intrinsic jitter and noise) can cause jitter measurements to be different. We’ll help you know how to setup your test equipment to optimize jitter measurement accuracy with a particular focus on obtaining good correlation between sampling and real-time oscilloscopes.

Speakers:

  • Robert Sleigh, Senior Product Manager, Agilent Technologies
  • Greg Lecheminant, Technical Applications Engineer, Agilent Technologies
  • Brian Fetz, Marketing, Agilent Technologies


Making DDR4 Work for You

Date: Wednesday, January 30, 2013
Time: 8:30am - 12:00pm
Location: Mission City Ballroom, Room M2

Designers who want to understand the challenges with DDR4 designs compared to DDR3 and what the most sensitive parameters of the channel that need special attention should attend this education forum. Perry Keller, JEDEC board of directors, will review the key changes from DDR3 to DDR4 and give insights to understanding the DDR4 timing specification. Other experts will also discuss the importance of modeling the prototype, separating reads and writes, accurately capturing a DDR4 signal and advice on best probing techniques. Join us for this education forum and learn everything you needed to know for DDR4 design and test, but were afraid to ask.

Speakers:

  • Perry Keller, Chairman of UFSA Compliance Committee, Agilent Technologies
  • Heidi Barnes, Senior Application Expert, Agilent Technologies
  • Ai-Lee Kuan, Product Marketing Engineer, Agilent Technologies
  • Jennie Grosslight, Senior Product Marketing Engineer, Agilent Technologies


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About Agilent

Agilent's high-speed digital solution set is a range of essential tools to help engineers Design & Simulate; Analyze, Debug and Ensure Compliant Designs while cutting through the challenges of gigabit digital designs. Our signal-integrity solutions address high-performance probing (with oscilloscopes, logic analyzers, TDRs, & network analyzers); high-speed interconnect analysis/simulation; jitter analysis; FPGA debug; Design & Test of DDR memory, USB, PCI Express, Serial-ATA, HDMI, DisplayPort, Gigabit Ethernet, Fiber Channel and much more. With Agilent, you'll be equipped to Pinpoint, Optimize and Deliver your designs on time.