DesignCon 2015 Technical Program Committee
The DesignCon Technical Program Committee is comprised of more than 100 leading experts in all levels of electronic design – chip, board, package and system – dedicated to the DesignCon standard for excellence. Their contributions, including the review of abstracts and papers, are critical to the technical program and ensure the speakers and topics at DesignCon are of the highest quality and relevance.
A - E
Brice Achkir, Distinguished Engineer, Cisco Systems
Ravinder Ajmani, Principal Engineer, HGST, a Western Digital company
John Andresakis, Vice President of Technology, Oak-Mitsui Technologies
Yianni Antoniades, Sr. Electrical Engineer, Winchester Electronics Corporation
Kuo An-Yu, Architect, Cadence Design Systems
Bruce Archambeault, Distinguished Engineer, IBM
Pervez Aziz, Distinguished Engineer, LSI
Amolak Badesha, Senior R&D Manager, Avago Technologies
Rula Bakleh, SI/PI Specialist, Woodward McCoach, Inc.
Heidi Barnes, Senior Engineer, Agilent Technologies
Dana Bergey, Signal Integrity Manager, FCI
Todd Bermensolo, SI engineer, Intel
Wendem Beyene, Senior Principal Engineer, Rambus
Brad Brim, Product Engineer, Cadence Design Systems
David Brunker, Technical Fellow, SI, Molex
Jeremy Buan, SI engineer, Hirose Electric USA
Robert Carter, Sr Manager of Business Development, Oak-Mitsui Technologies
Jinhua Chen, Senior Director, Luxshare-ICT
Wheling Cheng, Sr. HW Engineering Manager, Ericsson
Chris Cheng, Distinguished Technologist, Hewlett-Packard Company
Sam Chitwood, Product Engineer, Cadence Design Systems
Daniel Chow, Principle Signal Integrity Engineer
Daehyun Chung, Manager, Hardware Engineering, NVIDIA Corp.
Antonio Ciccomancini Scogna, Principal Engineer
Tom Cohen, Principal Development Engineer, Amphenol-TCS
Jan De Geest, Senior Staff R&D Signal Integrity Engineer, FCI
Jim DeLap, Technical Manager - HF East, ANSYS, Inc.
Jay Diepenbrock, Senior VP, High Speed Engineering, Lorom America
Vladimir Dmitriev-Zdorov, Principal Engineer, Mentor Graphics
David Dunham, SI Director, Molex
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F - J
Jun Fan, Assistant Professor, Missouri University of Science & Technology
Saverio Fazzari, Associate, Booz Allen Hamilton
John Grebenkemper, Consultant, TALI Consulting
Sanjeev Gupta, Signal Integrity Applications Expert, Avago Technologies
Hoss Hakimi, Hardware Validation Manager, Apple
Robert Haller, Hardware Architect, Extreme Networks
Gert Havermann, Signal Integrity Engineer, Harting Electronics GmbH
Tim Hollis, Senior Staff Engineer, Qualcomm, Inc.
Seunghyun Hwang, Sr. Signal/Power Integrity Engineer, NVIDIA Corp.
Sachin Idgunji, Principal Engineer, NVIDIA Corp.
Alfonso Iniguez, Design Verification Lead, Microchip Technology
Cosmin Iorga, Sr. Staff Design Engineer, Inphi
Mike Jenkins, Senior Staff Design Engineer, Xilinx
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K - O
Kumar Keshavan, Sr. Architect, Cadence Design Systems
Namhoon Kim, Senior Principal Signal Integrity Engineer, Broadcom Corporation
Woopoung Kim, Senior Staff Engineer, Qualcomm, Inc
Bendik Kleveland, Sr. Director Design Engineering, MoSys, Inc.
Vikas Kohli, Architect, Cadence Design Systems
Ravi Kollipara, Senior Principal Engineer, Rambus
Billy Koo, Principal Engineer, Samsung Electronics
Young Kwark, Research Staff Member, IBM T. J. Watson Research Center
Greg Le Cheminant, Measurement Applications Engineer, Agilent Technologies
Beomtaek Lee, Senior Principal Engineer, Intel
Zhe Li, Engineer, Altera
Mike Peng Li, Principal Architect, Altera
Joy Li, Product Engineer, Cadence Design Systems
Feng Ling, CEO, Xpeedic Technology, Inc.
Cathy Liu, R&D Director, Avago Technologies
Chris Loberg, Senior Manager, Tektronix, Inc.
Om Mandhana, Senior Technical Education Consultant, Cadence Design Systems
Henri Maramis, Technology Architecture Manager, Intel
Mark Marlett, Sr. Principal Engineer, Inphi
Jon Martens, Fellow, Anritsu
Mehdi Mechaik, Senior Signal Integrity Engineer, NVIDIA Corp.
Martin Miller, Chief Scientist, LeCroy Corporation
Jose Moreira, Senior R&D Engineer, Advantest
Zhen Mu, Engineering Manager, Mentor Graphics
Prathap Muthana, Sr. Signal Integrity Engineer, NVIDIA Corp.
Jim Nadolny, Senior SI and EMI Specialist, Samtec, Inc.
Alfred Neves, Chief Technologist, Wild River Technology LLC
George Noh, Sales and Marketing Director, Holt Integrated Circuits
Istvan Novak, Distinguished Engineer, Oracle
Gourgen Oganessyan, Product Manager, Hirose Electric USA
Dan Oh, Signal and Power Integrity Architect, Altera
Glenn Oliver, R&D Engineer, DuPont Electronic Technologies
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P - T
Vishram Pandit, Power Integrity Engineer, Intel
Priya Pathmanathan, Senior Analog Engineer, Intel
John Plasterer, Manager, Mixed Signal Development, PMC-Sierra
Peter Pupalaikis, VP & Principal Technologist, LeCroy Corporation
Vira Ragavassamy, Principal Engineer, Intel
Shafiq Rahman, Technical Staff Member, Hewlett-Packard
Mike Resso, Signal Integrity Specialist, Agilent Technologies
Lee Ritchey, President, Speeding Edge
Gerardo Romo, Staff Engineer/Manager, Qualcomm Inc.
Steve Sandler, Managing Director, Picotest
Martin Schauer, Principal Application Engineer, CST of America
Ralf Schmitt, Director, ASIC Design, Juniper Networks
Chris Scholz, Product Manager, Rohde & Schwarz
Christian Schuster, Professor, Technical University Hamburg-Harburg
Stefaan Sercu, Principle SI Engineer, Samtec, Inc.
Megha Shanbhag, Signal Integrity Engineer, TE Connectivity
Hong Shi, Technical Director, Xilinx
Yuriy Shlepnev, President, Simberian, Inc.
Chad Smutzer, Senior Engineer, Mayo Clinic
Michael Steinberger, Lead Architect, SiSoft
Ransom Stephens, Applied Electrodynamics Scientist, Ransom's Notes
Shishuang Sun, Senior Member of Technical Staff, Apple
Donald Telian, SI Consultant, SiGuys
Helene Thibieroz, Staff Technical Marketing Manager, Synopsys
Lars Thon, Consultant, LT Engineering
Peter Tomaszewski, Principal Hardware Engineer
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U - Z
Ambrish Varma, Member of Consulting Staff, Cadence Design Systems
Harald von Sosen, Principal Engineer, Synopsys
Min Wang, Sr. Engineering Manager, Intel
Yong Wang, Director, Device Power and Signal Integrity, Xilinx
Scott Wedge, Sr. Staff Engineer, Synopsys
Todd Westerhoff, Vice President, SiSoft
Ken Willis, Product Engineering Director, Cadence Design Systems
Markus Witte, Director, Harting Electronics GmbH
Randy Wolff, Signal Integrity Modeling Manager, Microchip Technology
Henry Wong, Principal Architect, Huawei
Hsinho Wu, Principal Design Engineer, Altera
Chris Wyland, Manager
Mobashar Yazdani, Strategic Silicon Manager, Google, Inc.
Arch Zaliznyak, Manager, Design Engineering, Altera
Jianmin Zhang, SI/PI Principal Engineer, Apple
Geoffrey Zhang, Principal Engineer Manager, Xilinx
Pavel Zivny, Product Engineer, Tektronix, Inc.