• Conference
    Jan 31-Feb 2, 2017
  • Expo
    Feb 1-2, 2017
  • Santa Clara, CA
    Santa Clara Convention Center

Technical Program Committee

The DesignCon 2017 Technical Program Committee is comprised of more than 80 leading experts in all levels of electronic design – chip, board, package and system – dedicated to the DesignCon standard for excellence. Their contributions, including the review of abstracts and papers, are critical to the technical program and ensure the speakers and topics at DesignCon are of the highest quality and relevance.

A - E

Rula Bakleh, SI/PI Consultant, Teraspeed Consulting
Heidi Barnes, Applications Engineer, Keysight Technologies
Todd Bermensolo, Senior Signal Integrity Engineer & Manager, Intel Corporation
Wendem Beyene, Technical Director, Rambus Inc.
Luis Boluna, Senior Applications Engineer, Keysight Technologies
Brad Brim, Product Engineering Architect, Cadence Design Systems
David Brunker, Technical Fellow, Molex
Robert Carter, Vice President of Technology and Business Development, Oak-Mitsui Technologies
Chris Cheng, Distinguish Technologist, HP Enterprise
Wheling Cheng, Sr. Manager, HW Engineering, Ericsson
Sam Chitwood, Product Engineer, Cadence
Daehyun Chung, Manager, Harware Engineering, NVIDIA Corp.
Antonio Ciccomancini Scogna, EM specialist for SIPI, Italy
Tom Cohen, Principal Engineer, Amphenol-tcs
O.J. Danzy, Application Engineer, Keysight Technologies, Inc.
Jan De Geest, Senior Staff SI R&D Engineer, Amphenol FCI
Jay Diepenbrock, Consultant, Consultant
Vladimir Dmitriev-Zdorov, Principal Engineer, Mentor Graphics
Greg Edlund, Senior Engineer, IBM

F - J

Sanjeev Gupta, Sr. R&D Manager, Foxconn Optical Interconnect Technology
Robert Haller, Sr. Principal Hardware Engineer, Extreme Networks Inc.
Gert Havermann, Signal Integrity Engineer, HARTING KGaA
Allen F. Horn III, Associate Reasearch Fellow, Rogers Corporation
Rockwell Hsu, Technical Leader, Cisco Systems
Seunghyun Hwang, Sr. SI/PI Engineer, Nvidia

K - O

Beomtaek Lee, Sr. Principal Engineer, Intel Corporation
Zhe Li, Senior Staff, Altera Corp
Joy Li, Product Engineer, Cadence
Mike Peng Li, Fellow, Altera
Cathy Liu, R&D Director, Avago Technologies
Chris Loberg, Sr. Marketing Manager, Tektronix
Om Mandhana, Staff Services, AE, Cadence Design Systems
Henri Maramis, President/CEO, Signata Corporation
Jon Martens, Fellow, Anritsu
Scott McMorrow, Research & Development Consultant, Teraspeed Consulting - A Division of Samtec
Mehdi Mechaik, Senior Technical Staff Member, IBM
Ted Mido, Principal R&D, Synopsys Inc
Martin Miller, Chief Scientist, Teledyne-LeCroy
Jose Moreira, Senior Staff Engineer, Advantest
Zhen Mu, Sr. Principal Product Engineer, Cadence Design Systems
Jim Nadolny, Principle SI & EMI Engineer, Samtec
Nechandrin Naicker, Technical Director, Cirtech EDA
Al Neves, Chief Technologist, Wild River Technology
George Noh, Director of Marketing & Sales, Holt Integrated Circuits
Istvan Novak, Senior Principle Engineer, Oracle
Chudy Nwachukwu, Finance, Technology & Manufacturing Group, Intel
Dan Oh, SI/PI Architect, Intel
Glenn Oliver, Senior Engineer, DuPont

P - T

Vishram Pandit, Engineering Manager, Intel Corporation
Jongbae Park, SI/PI Engineer, Apple
Peter Pupalaikis, Vice President, Technology Development, TeleDyne LeCroy
Fangyi Rao, Master R&D Engineer, Keysight
Lee Ritchey, President, Speeding Edge
Gerardo Romo Luevano, Engineer, Staff/Manager, Qualcomm Tech Inc
Steven Sandler, Managing Director, Picotest
Venkat Satagopan, Staff Signal Integrity Engineer, Qualcomm Technologies, Inc.
Chris Scholz, Product Manager, Rohde & Schwarz
Christian Schuster , Professor, Hamburg University of Technology (TUHH))
Stefaan Sercu, SI engineer, Samtec
Masashi Shimanouchi , Principal Engineer, Intel
Yuriy Shlepnev, President, Simberian Inc
Chad Smutzer, Senior Engineer, Mayo Clinic
Mike Steinberger, Lead Architect, Serial Channel Products, SiSoft
Ransom Stephens, Signal Integrity Sage, Ransom's Notes
Suresh Subramaniam, Director of Engineering, Whizz Systems
Donald Telian, Owner / SI Consultant, SiGuys
Lars Thon, Consultant, LT Engineering
Thomas To, Technical Director, Xilinx Inc.
Peter Tomaszewski, Sr Field Applications Engineer, Tektronix

U - Z

Badhri Uppiliappan, Senior Staff CAD Engineer, Analog Devices
Ambrish Varma, Sr. Principle Software Engineer, Cadence Design Systems
Harald von Sosen, Principal Engineer, Synopsys
Yong Wang, Sr. Director, Xilinx Inc.
Min Wang, Hareware Engineer, Google, Self-Driving Car Project
Scott Wedge, Principal Engineer, Synopsys, Inc.
Ken Willis, Product Engineering Director, Cadence Design Systems
Markus Witte, Signal Integrity Manager, HARTING KGaA
Randy Wolff, Principal Engineer - Silicon SI, Micron Technology
Hsinho Wu, Principal Design Engineer, Intel
Chris Wyland, CEO, Wyland Consulting
Mobashar Yazdani, Strategic Silicon Manager, Google Inc.
Iliya Zamek, Technical Lead, Intel/HCL
Geoffrey Zhang, Director, SerDes Architecture and Modeling, Xilinx Inc.
Pavel Zivny, Domain Expert, HSSD, Tektronix