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Best Paper Awards

DesignCon Paper Awards recognize outstanding contributions to the educational goals of the DesignCon program. Papers are judged both on the merits of the written document and on the quality of their presentation at DesignCon 2014. The Awards serve to acknowledge the authors who receive them as leading practitioners in semiconductor and electronic design. The Awards also provide incentive to authors to produce high-quality DesignCon papers and present them in a lucid and compelling manner.

DesignCon Paper Award recipients are selected through a two-prong process. The first step is a review of the full-length papers accepted for the current year's program. Members of the DesignCon Technical Program Committee rank these papers based on quality, relevance, impact, originality, and commercial content, which determines the finalists for each award category. While selection as a finalist for a DesignCon Paper Award is a notable achievement in itself, winners are then chosen from the finalists based on the quality of their presentations. Presentation quality is judged based on audience feedback collected at DesignCon.


2014 Paper Award Winners

Chip-Level Design Category

“Converting Verilog/SystemVerilog to C++ for Usage with Data Flow Simulator and IBIS-AMI”

Zao Liu, Intel Corporation
Miguel Yanez, Jr., Intel Corporation
Torstein Molvik, Intel Corporation
Todd Bermensolo, Intel Corporation

“Measured Random Jitter in a 300 Gbit Optical Data Link using a Chip-scale FBAR Oscillator for the Reference Clock”

Richard Ruby, Avago Technologies
Andrew Seidel, Avago Technologies
Sanjeev Gupta, Avago Technologies


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Board and System Design Category

“Power Integrity Analysis of Chip-Package-System (CPS) of a Mobile AP using Extended CPM Technique”

Kyoungchoul Koo, Samsung Electronics Inc.
Youngsoo Lee, Samsung Electronics Inc.
Woncheol Baek, Samsung Electronics Inc.

“Practical Design Considerations for Dense, High-Speed, Differential Stripline PCB Routing Related to Bends, Meanders and Jog-outs”

Michael Degerstrom, Mayo Clinic
Chad Smutzer, Mayo Clinic
Barry Gilbert, Mayo Clinic
Erik Daniel, Mayo Clinic


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High-Speed Design Category

“The Road to 1TBps Bandwidth Systems: A Case Study”

Prathap Muthana, NVIDIA Corporation
Daehyun Chung, NVIDIA Corporation
Venkat Satagopan, NVIDIA Corporation
Daniel Lin, NVIDIA Corporation

“Modulation, Equalization, and Forward Error Correction Coding Technologies for a 56 Gbps Chip-to-Module Link”

Adam Healey, LSI Corporation
Cathy Liu, LSI Corporation


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Interconnect Design & Test Category

“Moving Higher Data Rate Serial Links into Production - Issues & Solutions”

Donald Telian, SiGuys
Sergio Camerlo, Ericsson
Kusuma Matta, Ericsson
Michael Steinberger, SiSoft
Barry Katz, SiSoft
Walter Katz, SiSoft

“Real-Time Jitter Measurement”

Michael Schnecker, Rohde & Schwarz

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Power and RF Design Category

“Analysis and Correlations of Supply Noise and Jitter Impact on DDR3L Memory Interface”

Jayong Koo, Intel Corporation
Jongbae Park, Intel Corporation
Almario Delos Angeles, Intel Corporation
Vishram Pandit, Intel Corporation

“Quantitative EMI Analysis of Electrical connectors Using Simulation Models”

Michael Rowlands, Molex
Alpesh Bhobe, Cisco Systems, Inc.
Patrick Casher, Molex
Xiao Li, Cisco Systems, Inc.


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2013 PAPER AWARD WINNERS

Chip-Level Design Category

"3D Si Interposer Design and Electrical Performance Study"

Mandy (Ying) Ji, Rambus
Ming Li, Rambus
Julia Cline, Rambus
David Secker, Rambus
Kevin Cai, Rambus
John Lau, ITRI
Pei-Jer Tzeng, ITRI
Chau-Jie Zhan, ITRI
Ching-Kuan Lee, ITRI

"Applying Microwave Techniques to Digital Systems - A Simple Case Study"

Andrew Becker, Cray
Michael Higgins, Cray
Michael Steinberger, SiSoft
Paul Wildes, SiSoft


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Board and System Design Category

"Simulating Simultaneous Switching Noise with IBIS v5.0 Models"

Romi Mayder, Xilinx
Chris Wyland, Xilinx
Bradley Brim, Cadence
Yingxin Sun, Cadence

"Analytic Solutions for Periodically Loaded Transmission Line Modeling"

Priya Pathmanathan, Intel
Paul Huray, University of South Carolina
Steve Pytel, ANSYS


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High-Speed Design Category

"Dramatic Noise Reduction using Guard Traces with Optimized Shorting Vias"

Eric Bogatin, Bogatin Enterprises
Lambert Simonovich, Lamsim Enterprises


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Interconnect Design & Test Category


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Power and RF Design Category

"Validating EMC Simulation by Measurement in Reverberation Chamber"

Xiaoxia Zhou, Cisco Systems
Jing Li, Cisco Systems
Hongmei Fan, Cisco Systems
Alpesh Bhobe, Cisco Systems
Kam Taunk, Cisco Systems
Jinghan Yu, Cisco Systems
Philippe Sochoux, Cisco Systems


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