• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    | Santa Clara, CA

Best Paper Awards

DesignCon Paper Awards recognize outstanding contributions to the educational goals of the DesignCon program. Papers are judged both on the merits of the written document and on the quality of their presentation at DesignCon. The Awards serve to acknowledge the authors who receive them as leading practitioners in semiconductor and electronic design. The Awards also provide incentive to authors to produce high-quality DesignCon papers and present them in a lucid and compelling manner.

DesignCon Paper Award recipients are selected through a two-prong process. The first step is a review of the full-length papers accepted for the current year's program. Members of the DesignCon Technical Program Committee rank these papers based on quality, relevance, impact, originality, and commercial content, which determines the finalists for each award category. While selection as a finalist for a DesignCon Paper Award is a notable achievement in itself, winners are then chosen from the finalists based on the quality of their presentations. Presentation quality is judged based on audience feedback collected at DesignCon.

2016 Paper Award Winners

High-Speed Signal Design

“A Versatile Spectrum Shaping Scheme for Communicating Beyond Notches in Multi-Drop Interfaces”
Ali Hormati, Kandou Bus, Switzerland
Armin Tajalli, Kandou Bus, Switzerland
Christoph Walter, Kandou Bus, Switzerland
Kiarash Gharibdoust, EPFL, Switzerland
Amin Shokrollahi, Kandou Bus, Switzerland


“Mid-Frequency Noise Coupling Between DC-DC Converters and High-Speed Signals”
Laura Kocubinski, Oracle
Gustavo Blando, Oracle
Istvan Novak, Oracle

Memory & Parallel Interfaces

“Analysis and Verification of DDR3/DDR4 Board Channel Impact on Clock Duty-Cycle-Distortion (DCD)”
GaWon Kim, Altera
June Feng, Altera
Marjan Mokhtaari, Altera
David Lieby, Altera
Janmejay Adhyaru, Altera
Balaji Natarajan, Altera
Dan Oh, Altera


“Optimal DDR4 System with Data Bus Inversion Feature in FPGA High Speed High Bandwidth Memory Interface”
Thomas To, Xilinx
Changyi Su, Xilinx
Juan Wang, Xilinx
Penglin Niu, Xilinx
Yong Wang, Xilinx

Test & Measurement

“Jitter, Noise Analysis and BER Synthesis on PAM4 Signals on 400 Gbps Communication Links”
Maria Agoston, Tektronix
Mark L. Guenther, Tektronix
Richard J. Poulo, Tektronix
Kalev Sepp, Tektronix
Pavel Zivny, Tektronix

“BER- and COM-Way Channel Compliance Evaluation: What are the Sources of Difference?”
Vladimir Dmitriev-Zdorov, Mentor Graphics
Cristian Filip, Mentor Graphics
Chuck Ferry, Mentor Graphics
Alfred P. Neves, WildRiver Technology


“A New Characterization Technique for Glass Weave Skew Sensitivity”
Eric Bogatin, Teledyne LeCroy
Bill Hargin, Nan Ya Plastics
Vinit Sonawane, Univ. of Colorado, Boulder
Sanket Sapre, Univ. of Colorado, Boulder
Vidyadhar Yashwant Deodhar, Univ. of Colorado, Boulder
Nikhil Joshi, Univ. of Colorado, Boulder
Anand Ursekar, Univ. of Colorado, Boulder

Power Integrity

“Impacts of Dynamic Noise in Multi-Core or SOC Designs”
Yujeong Shim, Altera
Dan Oh, Altera

“Electrical and Thermal Consequences of Non-Flat Impedance Profiles”
Jae Young Choi, Oracle
Ethan Koether, Oracle
Istvan Novak, Oracle

“Chip and Package-Level Wideband EMI Analysis for Mobile DRAM Devices”
Jin-Sung Youn, Samsung Electronics
Jieun Park, Samsung Electronics
Jinwon Kim, Samsung Electronics
Daehee Lee, Samsung Electronics
Sangnam Jeong, Samsung Electronics
Junho Lee, Samsung Electronics
Hyo-Soon Kang, Samsung Electronics
Chan-Seok Hwang, Samsung Electronics
Jong-Bae Lee, Samsung Electronics

2015 Paper Award Winners

Modeling & Simulation

"Behavioral Modeling of Random Jitter with Realistic Time and Frequency Dependence"
Scott Wedge, Synopsys, Inc.

"Practical Method for Modeling Conductor Surface Roughness Using Close Packing of Equal Spheres"
Bert Simonovich, Lamsim Enterprises Inc.


"Package Simulations For Mitigating Noise Coupling Onto Sensitive RF Signals"
Dmitry Fliter, CSR
Nir Malka, CSR

High-Speed Signal Design

"Does Skew Really Degrade SERDES Performance?"
Li Ying, Oracle
Vijay Kunda, Oracle
Shirin Farrahi, Oracle
Xun Zhang, Oracle
Gustavo Blando, Oracle
Istvan Novak, Oracle

"56+ Gb/s Serial Transmission using Duo-binary Signaling"
Timothy De Keulenaer, INTEC-IMEC
Jan De Geest, FCI
Johan Bauwelinck, Ghent University/iMinds
Jeffrey Sinsky, Alcatel-Lucent
Bartek Kozicki, Alcatel-Lucent


"A Simple And Innovative Circuit Technique To Tackle Power Supply Induced Jitter In High Speed Serial Links For 25Gbps Transmission And Beyond"
Yujeong Shim, Altera Corporation
Dan Oh, Altera Corporation

Power Integrity & Signal Integrity

"Vectorless Prediction of Simultaneous Switching Noise from FPGAs"
Chunchun Sui, Missouri University of Science and Technology


"Optimization of PCB Capacitors for Signal Integrity Performance in Mixed Reference Channels"
Gerardo Romo Luevano, Qualcomm Technology Inc.
Martin Schauer, CST of America
Darryl Kostka, CST of America
Selman Ozbayat, Qualcomm Technology Inc.

Test & Measurement

"100 Gb/s Ethernet 100GBASE-CR4 Test Points and Test Fixtures"
Christopher DiMinico, MC Communications
Mike Sapozhnikov, Cisco Systems
Mike Resso, Keysight Technologies


"One-Sided Measurement of Power Supply Impedance Without Connectors"
Joachim Held, Siemens AG
Richard Sjiariel, CST

Board and System Design Category

“Power Integrity Analysis of Chip-Package-System (CPS) of a Mobile AP using Extended CPM Technique”
Kyoungchoul Koo, Samsung Electronics Inc.
Youngsoo Lee, Samsung Electronics Inc.
Woncheol Baek, Samsung Electronics Inc.


“Practical Design Considerations for Dense, High-Speed, Differential Stripline PCB Routing Related to Bends, Meanders and Jog-outs”
Michael Degerstrom, Mayo Clinic
Chad Smutzer, Mayo Clinic
Barry Gilbert, Mayo Clinic
Erik Daniel, Mayo Clinic

Interconnect Design & Test Category

“Moving Higher Data Rate Serial Links into Production - Issues & Solutions”
Donald Telian, SiGuys
Sergio Camerlo, Ericsson
Kusuma Matta, Ericsson
Michael Steinberger, SiSoft
Barry Katz, SiSoft
Walter Katz, SiSoft


“Real-Time Jitter Measurement”
Michael Schnecker, Rohde & Schwarz