• Conference
    Jan 31-Feb 2, 2017
  • Expo
    Feb 1-2, 2017
  • Santa Clara, CA
    Santa Clara Convention Center



Santa Clara Convention Center, January 31, 2017 – February 2, 2017

Deadline for Abstracts: August 16, 2016 
Papers Due: November 15, 2016


We are pleased to announce this Call for Technical Papers, Panels and Tutorials for DesignCon 2017, the premier educational conference and technology exhibition for semiconductor and electronic design engineers. At DesignCon, engineers talk to engineers to find practical solutions to the challenging problems they share in design and verification. We emphasize education and peer-to-peer sharing among practicing engineers, creating a unique atmosphere for learning about state-of-the-art design methodologies and technologies. Individuals presenting papers at DesignCon will join an elite group offering leading-edge case studies, technology innovations, practical techniques, design tips, and application overviews.

We solicit abstracts for three types of sessions: technical papers, panels, and tutorials. Technical papers, which are up to 25 pages long, address design case studies and application overviews and are presented in 40-minute sessions. Technical panels are 75-minute presentation/discussion sessions featuring 3-5 panelists plus a panel chair to moderate the discussion. Tutorials are 3-hour sessions (papers up to 50 pages long are optional), allowing the speakers to cover topics in greater depth. Tutorials are scheduled for Tuesday, January 31; the technical paper sessions will be held on Wednesday–Thursday, February 1-2; technical panels are scheduled on Tuesday-Thursday at the end of each day’s program.

To Submit a Proposal

Prepare the following information and submit ONLINE by August 16, 2016:

  • Title of submission
  • Conference track preference (required), secondary track preference (optional). (Reviewers may move your submission to a more appropriate track based on the content provided in the submission)
  • Session format: 40-minute technical paper, 75-minute panel discussion, or 3-hour tutorial (If you have a secondary format preference, please note in the comments)
  • Audience level (all or advanced, REQUIRED) – prerequisites required for advanced
  • Key takeaways (50 words max, REQUIRED) – for use in the review process
  • Abstract (100 words max, REQUIRED) – for use on conference web site and mobile app if accepted
  • Extended abstract (500 words max, REQUIRED) – for use by reviewers to judge your proposal
  • Prerequisites (50 words max) – required for advanced audience levels
  • Keywords: Select relevant keywords
  • Comments (optional) – additional information for reviewers and staff in their consideration of your proposal
  • Authors can upload supplemental documents to support their proposal (optional)

Review Criteria

The DesignCon 2017 Technical Program Committee reviews all submissions based on quality, relevance, impact, and originality. Prospective authors are welcome to reference products as long as product references add to the educational value and are presented in an appropriately non-commercial fashion.

A. Quality – DesignCon papers, panels, and tutorials should be well organized and easily understood. The abstract and summary are judged as indicators of what can be expected of the paper or session.
B. Relevance – The proposed paper, panel, or tutorial should be highly relevant to the interests of the DesignCon audience in general and the track topic in particular.
C. Impact – DesignCon papers, panels, and tutorials should contribute to the educational mission of DesignCon. Submissions reporting on important results, methodologies, or case studies of special significance will be considered favorably. Submissions on related standards activities are welcome.
D. Originality – Reports on new design methodologies, case studies for innovative designs, or other novel results contribute to the DesignCon goal of providing a high-quality educational program for practicing engineers. However, outstanding proposals on “classic” or “introductory” topics will also be viewed favorably.
E. Commercial contentProduct promotion is not permitted in DesignCon technical sessions. Evidence of product promotion in a paper, panel, or tutorial proposal will lead to rejection of the proposal. It is acceptable to use a product in a design case study or as a proof of concept for a design methodology.

Note: The DesignCon Technical Program Committee reserves the right to request edits to submitted papers, or to reject a submitted paper if it fails to match the accepted abstract or above guidelines.

DesignCon 2017 Tracks

Below is a description of each DesignCon 2017 Track, along with sample topics. All relevant proposals—including topics other than those listed—will be considered.

Chip and package level decisions can make or break the high-performance interface. This track covers a wide variety of signal and power integrity topics at the chip & package level, including SoC issues, multi-chip integration, and power delivery networks, plus related noise and jitter mitigation strategies.

Sample Topics

  • Signal integrity (SI), power integrity (PI), and power delivery network (PDN) considerations in chip designs
  • Implications of chip-level decisions on systems design (e.g. frequency, timing, design overhead, voltage)
  • High-speed I/O design
  • On-chip instrumentation and measurement
  • On-chip current modeling and correlation
  • On-chip noise-to-jitter modeling and circuit implications/strategies
  • Multi-voltage and power-gating design for SOCs and circuit-level implications
  • Low-power strategies and implementation
  • Circuit and interface calibration techniques
  • Simultaneous switching noise (SSN) and crosstalk suppression techniques
  • Clock and reset strategies
  • 2.5D/3D interconnects and interposer design
  • Through-silicon vias (TSV)
  • SIP partition and IP integration
  • On-chip and chip-to-chip interconnect design and analysis
  • Pre-silicon validation and verification
  • Post-silicon validation and verification

Deadline for Abstracts: August 16, 2016