Signal Integrity Characterization Techniques addresses the gap between traditional digital and microwave measurement technologies while focusing on a practical and intuitive understanding of signal integrity effects within the data transmission channel. High-speed interconnects such as connectors, PCBs, cables, IC packages, and backplanes are critical elements of differential channels that must now be optimized using today's most powerful analysis and characterization tools. Both measurements and simulation must be done on the device under test and must yield data that correlates with each other. Most of this book focuses on real-world applications of signal integrity measurementsŃfrom backplane design challenges to advanced error correction techniques to jitter measurement tools. The authors' approach wisely address many of today's high-speed technologies, provides excellent insight into its future direction, and will teach the reader valuable lessons pertaining to the signal integrity industry.

DesignCon 2009
February 2 – 5, 2009
Santa Clara Convention Center, Santa Clara, California, USA

Power Distribution Network Design Methodologies is a collection of cogently written articles by 49 industry experts that fills the void on PDN design procedures and addresses such related topics as DC–DC converters, selection of bypass capacitors, DDR2 memory systems, powering of FPGAs, and synthesis of impedance profiles. Through these contributions from such leading companies as Sun Microsystems, Sanyo, IBM, Hewlett-Packard, Intel, and Rambus, readers can come to understand why books on power integrity are only now becoming available to the public and can relate these topics to current industry trends.

SiLab is a three-volume series of pre-recorded, high-quality laboratory sessions from the world's foremost authority on signal integrity. These informative DVDs provide exactly the kind of information engineers love to watch. Each volume in the Signal Integrity Lab Series runs approximately 30-40 minutes. Programs contain introductory remarks by Dr. Howard Johnson, a live demonstration, and a wrap-up section. Some programs include interviews with other authorities and off-site visits to manufacturing and test facilities. Every program leaves the viewer with a clear understanding of issues essential to high-speed performance.

Written by top experts from companies such as Rambus, IBM, Hewlett-Packard, and FreeScale, Intellectual Property for Electronic Systems addresses the issues that concern anyone in the IP field looking to keep systems safe and secure without sacrificing quality or ease of use. This publication will cover verification, standards, handoff, and legal issues to create a comprehensive look at one of the most important, yet sometimes under-appreciated, topics in the industry today.

With Design and Test for Multiple Gbps Communication Devices and Systems in hand, you will learn and master the basics of today's design and test methodologies and techniques. With this enhanced knowledge, you will be able to more fully understand the current challenges facing today's practitioners, as well as which existing solutions are best to combat those challenges.

This will help you to choose the right methods and tools for your designs and tests and will enable you to achieve greater efficiency, higher performance, and higher yields. This will ultimately lead to fewer device respins, faster times to market, on-time delivery, and higher overall productivity.

This collection of acclaimed papers from leading experts in industry and academia maintains a good balance between theory foundation and practical applications, with a strong emphasis on signal integrity and jitter, while presenting the latest technologies, methodologies, and advancements in design and test for multiple Gbps devices and systems.

The Functional Verification of Electronic Systems offers a comprehensive overview of functional verification from the points of view of leading experts currently at work in the electronic-design industry. As the size and complexity of modern chip designs have increased, the need for full and accurate functional verification during the design process has become still greater. Many companies are now realizing that verification is something they need as a core competence. However, the process of verification can devour a large portion of the effort devoted to a design project.

To address this, various techniques have emerged with the aim of improving the efficiency and effectiveness of the verification process. These include coverage, simulation, testbench automation, transaction-level modeling, and assertion-based verification. The Functional Verification of Electronic Systems examines past and current verification landscapes and assesses the technologies, languages, and methodologies in use today that will improve functional verification into the future.