• Conference
    Jan 29–31, 2019
  • Expo
    Jan 30–31, 2019
  • Santa Clara Convention
    | Santa Clara, CA

Best Paper Awards

DesignCon Paper Awards recognize outstanding contributions to the educational goals of the DesignCon program. Papers are judged both on the merits of the written document and on the quality of their presentation at DesignCon. The Awards serve to acknowledge the authors who receive them as leading practitioners in semiconductor and electronic design. The Awards also provide incentive to authors to produce high-quality DesignCon papers and present them in a lucid and compelling manner.

DesignCon Paper Award recipients are selected through a two-prong process. The first step is a review of the full-length papers accepted for the current year's program. Members of the DesignCon Technical Program Committee rank these papers based on quality, relevance, impact, originality, and commercial content, which determines the finalists for each award category. While selection as a finalist for a DesignCon Paper Award is a notable achievement in itself, winners are then chosen from the finalists based on the quality of their presentations. Presentation quality is judged based on audience feedback collected at DesignCon.


Chip-Level Design

"Characterizing and Selecting the VRM"
Steve Sandler, Picotest

Board/System-Level Design

"FastBER: A Novel Statistical Method for Arbitrary Transmitter Jitter"
Yunhui Chu, Intel Corporation
Alaeddin Aydiner, Intel Corporation
Kai Xiao, Intel Corporation
Beomtaek Lee, Intel Corporation
Dan Oh, Samsung Electronics
Oleg Mikulchenko, Intel Corporation
Adam Norman, Intel Corporation
Rob Friar, Intel Corporation
Charles Phares, Intel Corporation


"Non-Destructive Analysis and EM Model Tuning of PCB Signal Traces using the Beatty Standard"
Heidi Barnes, Keysight Technologies
José Moreira, Advantest
Manuel Walz, Advantest

"RX IBIS-AMI Model Silicon Correlation Metrics and Model Development Methodology"
Masashi Shimanouchi, Intel Corporation
Hsinho Wu, Intel Corporation
Mike Peng Li, Intel Corporation

Serial Link Design

"Exploring Efficient Variability-Aware Analysis Method for High-Speed Digital Link Design Using PCE"
Jan B. Preibisch, Technische Universität Hamburg-Harburg
Torsten Reuschel, Technische Universität Hamburg-Harburg
Katharina Scharff, Technische Universität Hamburg-Harburg
Jayaprakash Balachandran, Cisco Systems Inc.
Bidyut Sen, Cisco Systems Inc.
Christian Schuster, Technische Universität Hamburg-Harburg

"Investigation of Mueller-Muller CDR Algorithms in PAM4 High speed Serial Links"
Yuhan Yao, Oracle Corporation
Xun Zhang, Oracle Corporation
Dawei Huang, Oracle Corporation
Jianghui Su, Oracle Corporation
Muthukumar Vairavan, Oracle Corporation
Chai Palusa, Oracle Corporation

"PCIe Gen4 Standards Margin Assisted Outer Layer Equalization for Cross Lane Optimization in a 16GT/s PCIe Link"
Mohammad S. Mobin, Broadcom Ltd
Haitao Xia, Broadcom Ltd
Aravind Nayak, Broadcom Ltd
Gene Saghi, Broadcom Ltd
Christopher Abel, Broadcom Ltd
Lane Smith, Broadcom Ltd
Jun Yao, Broadcom Ltd

Power & RF Design

"Cost-effective PCB Material Characterization for High-volume Production Monitoring"
Yongjin Choi, Hewlett-Packard Enterprise
Christopher Cheng, Hewlett-Packard Enterprise
Yasin Damgaci, Hewlett-Packard Enterprise
Nagaraj Godishala, Hewlett-Packard Enterprise
Yuriy Shlepnev, Simberian

"Overview and Comparison of Power Converter Stability Metrics"
Joseph ‘Abe’ Hartman, Oracle
Alejandro 'Alex' Miranda, Oracle
Kavitha Narayandass, Oracle
Alexander Nosovitski, Oracle
Istvan Novak, Oracle

"RFI and Receiver Sensitivity Analysis in Mobile Electronic Devices"
Antonio Ciccomancini Scogna, Samsung Electronics Mobile Division, HE Group
Hwanwoo Shim, Samsung Electronics Mobile Division, HE Group
Jiheon Yu, Samsung Electronics Mobile Division, HE Group
Chang-Yong Oh, Samsung Electronics Mobile Division, HE Group
Seyoon Cheon, Samsung Electronics Mobile Division, HE Group
NamSeok Oh, Samsung Electronics Mobile Division, HE Group
Dong Sub Kim, Samsung Electronics Mobile Division, HE Group

2016 Paper Award Winners

High-Speed Signal Design

“A Versatile Spectrum Shaping Scheme for Communicating Beyond Notches in Multi-Drop Interfaces”
Ali Hormati, Kandou Bus, Switzerland
Armin Tajalli, Kandou Bus, Switzerland
Christoph Walter, Kandou Bus, Switzerland
Kiarash Gharibdoust, EPFL, Switzerland
Amin Shokrollahi, Kandou Bus, Switzerland


“Mid-Frequency Noise Coupling Between DC-DC Converters and High-Speed Signals”
Laura Kocubinski, Oracle
Gustavo Blando, Oracle
Istvan Novak, Oracle

Memory & Parallel Interfaces

“Analysis and Verification of DDR3/DDR4 Board Channel Impact on Clock Duty-Cycle-Distortion (DCD)”
GaWon Kim, Altera
June Feng, Altera
Marjan Mokhtaari, Altera
David Lieby, Altera
Janmejay Adhyaru, Altera
Balaji Natarajan, Altera
Dan Oh, Altera


“Optimal DDR4 System with Data Bus Inversion Feature in FPGA High Speed High Bandwidth Memory Interface”
Thomas To, Xilinx
Changyi Su, Xilinx
Juan Wang, Xilinx
Penglin Niu, Xilinx
Yong Wang, Xilinx

Test & Measurement

“Jitter, Noise Analysis and BER Synthesis on PAM4 Signals on 400 Gbps Communication Links”
Maria Agoston, Tektronix
Mark L. Guenther, Tektronix
Richard J. Poulo, Tektronix
Kalev Sepp, Tektronix
Pavel Zivny, Tektronix

“BER- and COM-Way Channel Compliance Evaluation: What are the Sources of Difference?”
Vladimir Dmitriev-Zdorov, Mentor Graphics
Cristian Filip, Mentor Graphics
Chuck Ferry, Mentor Graphics
Alfred P. Neves, WildRiver Technology


“A New Characterization Technique for Glass Weave Skew Sensitivity”
Eric Bogatin, Teledyne LeCroy
Bill Hargin, Nan Ya Plastics
Vinit Sonawane, Univ. of Colorado, Boulder
Sanket Sapre, Univ. of Colorado, Boulder
Vidyadhar Yashwant Deodhar, Univ. of Colorado, Boulder
Nikhil Joshi, Univ. of Colorado, Boulder
Anand Ursekar, Univ. of Colorado, Boulder

Power Integrity

“Impacts of Dynamic Noise in Multi-Core or SOC Designs”
Yujeong Shim, Altera
Dan Oh, Altera

“Electrical and Thermal Consequences of Non-Flat Impedance Profiles”
Jae Young Choi, Oracle
Ethan Koether, Oracle
Istvan Novak, Oracle

“Chip and Package-Level Wideband EMI Analysis for Mobile DRAM Devices”
Jin-Sung Youn, Samsung Electronics
Jieun Park, Samsung Electronics
Jinwon Kim, Samsung Electronics
Daehee Lee, Samsung Electronics
Sangnam Jeong, Samsung Electronics
Junho Lee, Samsung Electronics
Hyo-Soon Kang, Samsung Electronics
Chan-Seok Hwang, Samsung Electronics
Jong-Bae Lee, Samsung Electronics