Todd Westerhoff, SiSoft's vice president of software products, joins Eric to discuss critical issues in chip and board co-design. Drawing on his experience in providing signal integrity support to ASIC designers at Cisco, Todd comments on the importance of system integration in the design of on-die power structures and the challenges of timing closure with sub-100-picosecond margins.

Heidi Barnes, Load Board Design Consultant at Verigy, discusses the challenges of creating test fixtures to debug high-speed digital designs with Eric. In particular, she describes how a background in RF and microwave testing provides critical insights in developing test solutions at data rates in excess of 3 Gbps.

Eric discusses the signal integrity issues in developing an innovative family of wiring products for audio, video and data distribution with Fred Martin, director of research and development for the FlatWire Technologies Division of Southwire Company.

Design for signal integrity is a necessary element in developing high-speed circuitry. Eric Bogatin introduces this series of conversations with SI experts with his personal taxonomy of signal integrity problems, and a pledge to "empower all engineers with the skills they need to be their own expert."

The demand for analog/mixed-signal IP blocks has never been greater, especially at 65 nm and below. Today, you can get a complex analog front-end, USB PHY, or serial interconnects designed by the IP provider such that anyone can integrate them into their digital SoC. Or can they? Do companies really need to spend millions of dollars sustaining analog designers to do mixed-signal design? On the other hand, are the integration and support challenges so great that one should not rely on buying mixed-signal IP externally? Listen to a debate among experts, including Joachim Kunkel, Vice President and General Manager of the Solutions Group at Synopsys, then make up your own mind.