Access the DesignCon InfoVault for an educational experience like no other.
From a full library of technical papers, to video keynote presentations from leading
industry experts, the InfoVault offers key insight on the business and technical issues
facing electronic design and semiconductor industries.
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Paper Award Winner
Graham Allan, MOSAID Technologies Incorporated
Jody Defazio, MOSAID Technologies Incorporated
Today's SoC designers face an increasingly daunting task when they are required to develop an SoC that requires a DDR SDRAM interface. Problems include the requirement for both ASIC and mixed-signal design flows, complex verification, intimacy with the DRAM components (and the road maps), and short chip life cycles and time to market. Fortunately, there is a semiconductor IP solution that addresses these problems and reduces development costs as well. Licensing an advanced process-independent DDR SDRAM memory controller in combination with the process-specific physical interface provides a silicon proven solution that also significantly reduces overall design risk.
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Paper Award Winner
James L. Drewniak, University of Missouri-Rolla
Bruce Archambeault, IBM Research
James Knighten, NCR Corporation
Giuseppe Selli, University of Missouri
Jun Fan, NCR Corporation
Matteo Cocchini, University of Missouri-Rolla
Samuel Connor, IBM Research
Liang Xue, National Semiconductor
This paper presents a method for testing jitter tolerance of SerDes receivers using the timing
misalignment between the jittered bit clock and the recovered clock. To estimate the jitter
tolerance, the method first injects random jitter into the serial bit stream and measures the
jitter transfer function of the CDR in the SerDes receiver. The paper derives an equation for
estimating BER accurately using the jitter transfer function of SerDes CDRs. The method is much
faster than the conventional BERTS method. The accuracy and test speed of the method are verified
by 2.5 Gbps-SerDes experiments.
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Senior Fellow and Chief Platform Architect
AMD
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President, Chief Executive Officer and Chairman of the Board
Xilinx
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John A. Edwardson Dean of Engineering, College of Engineering
Purdue University
IEEE 2007 President and CEO
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Todd Westerhoff, SiSoft's vice president of software products, joins Eric to discuss critical issues
in chip and board co-design. Drawing on his experience in providing signal integrity support to ASIC
designers at Cisco, Todd comments on the importance of system integration in the design of on-die
power structures and the challenges of timing closure with sub-100-picosecond margins.
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Heidi Barnes, Load Board Design Consultant at Verigy, discusses the challenges of creating test fixtures to debug high-speed
digital designs with Eric. In particular, she describes how a background in RF and microwave testing provides critical insights
in developing test solutions at data rates in excess of 3 Gbps.
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Eric discusses the signal integrity issues in developing an innovative family of wiring products for audio,
video and data distribution with Fred Martin, director of research and development for the FlatWire Technologies
Division of Southwire Company.
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Design for signal integrity is a necessary element in developing high-speed circuitry. Eric Bogatin introduces
this series of conversations with SI experts with his personal taxonomy of signal integrity problems, and a pledge
to "empower all engineers with the skills they need to be their own expert."
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The demand for analog/mixed-signal IP blocks has never been greater, especially at 65 nm and below. Today, you
can get a complex analog front-end, USB PHY, or serial interconnects designed by the IP provider such that anyone
can integrate them into their digital SoC. Or can they? Do companies really need to spend millions of dollars
sustaining analog designers to do mixed-signal design? On the other hand, are the integration and support challenges
so great that one should not rely on buying mixed-signal IP externally? Listen to a debate among experts, including
Joachim Kunkel, Vice President and General Manager of the Solutions Group at Synopsys, then make up your own mind.
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Richard Pitwon, Senior Photonics Engineer, Xyratex Technologies Ltd.
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Eugene Mayevskiy, Applications Engineer, Tektronix, Inc.
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Vice President, Software Products
SiSoft
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President, VSI Alliance
IP Strategy and Business Manager, Freescale Semiconductor
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Private Investor
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