This panel looks into the new challenges in validation of designs using above mentioned power management techniques. Some of the initial techniques focused on structural checking of power management issues combined with limited amount of simulation using methods like x–injection. More recent advances are resulting in enhancement of simulators to induce effects of power gating, state retention, power sequencing, and voltage changes.

There exists data from power managed designs that points to structural checkers as the central tool for validation of large class of issues power management issues even including issues such as incorrect reset on wake–up.

To what extent do we need dynamic simulation to validate power management issues? Does power management validation significantly increase the amount of simulation needed to validate the design or is it only incremental when combined with smart structural checkers? Also, what is the right level of abstraction at which dynamic simulation should be carried out?