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Program Schedule
4-WA1
Multi-GHz On-Chip Power Grid Modeling Method
Wednesday, February 3 | 8:30 am - 9:10 am
Leonid Proekt, Intel
Vishram Pandit, Power Integrity Engineer, Intel
On-chip power grid modeling is challenging as it comprises complex metal structures on multiple layers. For high speed interfaces, the accurate grid model is essential for the system design. In this paper, we introduce a new on-chip power grid modeling engine which is electromagentic in nature. The output of the engine can be S parameter model or the RC netlist. Its accuracy is verified with the special test vehicle. The engine is used to assess the impact of a power grid intrinsic capacitance on performance of serial interface design.

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