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11-TA4
Building IC-Package-PCB System EMI/EMC Verification and Early Design Flows: Challenges and Methods
Tuesday, February 2 | 11:00 am – 11:40 am

Rajen Murugan, Signal Integrity Engineer, Texas Instruments
Swagato Chakraborty, Vice President of Products, Physware Inc.
Souvik Mukherjee, Signal Integrity Engineer, Texas Instruments
Dr. Dipanjan Gope, Vice President, R&D, Physware Inc.
Dr. Vikram Jandhyala, Founder & CEO, Physware Inc. & Associate Professor Univ. of Washington

Package and PCB-system aware IC co-design and verification entails early awareness of signal integrity, power integrity, timing, and electromagnetic interference (EMI) impact on designs functionality and performance. Higher frequencies, along with stringent EMC regulations, are driving the need for developing EMI-aware design methodologies in the earlier and sign-off phases of the design cycle. . This paper discusses the significant challenges of scale, connectivity, turnaround time, and accuracy needed in developing such a flow. In particular, the numerical effect of violating established EMI guidelines is quantified in the flow, enabling cutting-edge designs that are less conservative and still satisfy EMI constraints.

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