Phone: +1-312-559-3658
E-mail: kpost@iec.org
Contact: Lisa Reyes
Phone: +1-312-559-3325
E-mail: lreyes@iec.org
CHICAGO – January 29, 2009 – The International Engineering Consortium’s (IEC) introduces the new IP Summit, a featured program fully integrated with the DesignCon conference and exhibition February 2–5 at the Santa Clara Convention Center. The IP Summit will address the role of semiconductor IP in electronic design through featured speakers, panels, tutorials, technical papers and exhibits.
“Using semiconductor IP can yield savings in time and cost,” stated DesignCon Program Director Barry Sullivan. “As the industry increasingly relies on semiconductor IP to deliver complex designs in a timely manner, the newly created IP Summit will raise the visibility of this subject area within the DesignCon technical program and technology exhibition.”
The IP Summit begins with Monday’s keynote address by IP Summit Chair, Mark Gogolewski, chief technology officer at Denali. It also includes the Business Forum Panel “Embracing a New Paradigm: EDA Tools and IP as Solutions Enablers” chaired by Bill Martin, IP Interest Group chair for the Global Semiconductor Alliance (GSA) and general manager of Verification IP at Mentor Graphics. Panelists include Bill Finch, senior vice president at Cast; Camille Kokozaki, IDT’s director of design automation; Herb Reiter, president of eda 2 asic Consulting, Inc.; Piyush Sancheti, Atrenta’s senior director of business development; Ravi Thummarukudy, vice president and general manager of IC solutions, GDA Technologies; and Mahesh Triupattur, Analog Bits’ executive vice president.
The Summit will feature a track on IP re-use and integration including a technical panel entitled “Selecting IP in a Complex Design Environment,” chaired by Raghavan Menon, director of engineering, Virage Logic. Panelists include Kalar Rajendiran, senior director of marketing, eSilicon Corporation; Gabriele Saucier, president of Design and Reuse; and Adam Traidman, group marketing director of the chip planning solutions organization at Cadence Design Systems.
The featured program is supported by IP Summit Sponsor, Denali; IP Ecosystem Sponsor, ChipEstimate.com; and IP Summit exhibitors Cast, ChipEstimate.com, Denali, Dolphin Integration, Kilopass, Mixel, NSCore, Rambus, and Virage Logic.
Visit www.designcon.com/2009/ for full information or contact Katie Post at kpost@iec.org or +1-312-559-3658.
About the IEC
A nonprofit organization, the IEC is dedicated to catalyzing technology and business progress worldwide in a range of high-technology industries and their university communities. Since 1944, the IEC has provided high-quality educational opportunities for industry professionals, academics, and students.
In conjunction with industry-leading companies, the IEC has developed an extensive, free, on-line educational program. The IEC conducts industry-university programs that have a substantial impact on curricula. It also conducts research and develops publications, conferences, and technological exhibits that address major opportunities and challenges of the information age.
More than 70 leading universities are IEC affiliates, and the IEC handles the affairs of the Electrical and Computer Engineering Department Heads Association and Eta Kappa Nu, the honor society for electrical and computer engineers. Please visit www.iec.org.
