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Special Floor Activities
DesignTOUR
Podcasts
Exhibitor TecPreview Presentations
TecPreviews at DesignCon provide attendees with a detailed description and hands-on demonstration of the hottest new products and services — live from the DesignCon exhibition floor!
1:30 pm – 1:50 pm
TecPreview Presentation
Serial Data Network Analysis
Dima Smolyansky
Sampling Scope Marketing
Mr. Smolyansky spent his professional career in the instrumentation and measurement industry, working with high-speed time domain reflectometry oscilloscopes and frequency domain network analyzers. He is currently responsible for TDR and S-parameter serial data measurement solutions at Tektronix. During his professional career, Mr. Smolyansky has accumulated significant experience in the area of high-speed digital interconnect measurements and modeling. He has published a number of papers and taught short courses on interconnect measurements and modeling. He holds the M.S.E.E. degree from Oregon State University and the Engineer Diploma (M.S.) degree from Kiev Polytechnic Institute
2:00 pm – 2:20 pm
TecPreview Presentation
V-O Halogen-free Engineering Polymers for Greener Electronics
For the ever-increasing demands of the electronics market, Ticona Engineering Polymers, the global leader in LCP for connectors, offers a broad product line of V-0 Halogen-free polymers. The presentation will focus on Vectra® LCP and why this proven polymer is becoming the material of choice for high performance electronic components. Its key features and benefits including high flow for thin wall parts for high-speed connectors, high temperature resistance (short-term up to 340℃) for lead-free soldering, higher production rates, recyclability (up to 50% regrind with UL approval) and most importantly, reduction of Total Manufacturing Costs while maintaining V-0 UL approval for flame resistance will be discussed. Also included is an overview on V-O halogen-free Celanex® XFR® thermoplastic polyester (PBT). Information on inherently flame resistant Fortron® PPS, which can withstand high temperature soldering up to 270℃, and exhibits excellent dimensional stability and creep resistance will also be presented.
Edson Ito
Edson Ito has more than 14 years experience in engineering polymers and thermoplastics. Edson joined Ticona Engineering Polymers in 1994 as part of the Hoechst Brasil S.A. Engineering Plastics Division located in São Paulo, Brazil.
Later responsibilities included Development Engineer – South America (Brazil, Argentina, Chile), Marketing Manager – North America – Electrical & Electronics, Automotive & General Industry, Process Excellence and Six Sigma Black Belt – Marketing. He is currently Vectra® LCP Technical Marketing Manager.
Edson has a Bachelor of Science degree in Material Engineering – Polymers from Universidade Federal de São Carlos (Federal University of São Carlos), São Paulo, Brazil and received certification as a Six Sigma Black Belt from Sigma Breakthrough Technologies Inc – SBTI.
2:30 pm – 2:50 pm
LeCroy TecPreview Presentation
3:00 pm – 3:20 pm
TecPreview Presentation
Is DDR3 Right for You?
Marc Greenberg
Director, Technical Marketing
Marc Greenberg is the Director of Technical Marketing for the IP products group at Denali Software, Inc. A Masters graduate from the University of Edinburgh in Scotland, Marc's career includes 5 years at Denali and 10 years at Motorola in IP creation, IP management and SoC Methodology roles in Europe and the USA. Marc represents Denali at JEDEC and has been working with Denali's Databahn memory controller since joining Denali in 2003. Speaker Headshot Attached.
3:30 pm – 3:50 pm
TecPreview Presentation
The Effects of Voltage Drop on Bit Error Rate
Designers can spend weeks of engineering effort, looking at every nuance, trying to design a robust serial channel to ensure that protocol bit error rates (BER) are met. However, there are indirect contributors to BER that often are overlooked or neglected, such as the supply voltage of the part. HyperLynx offers designers the ability to look at DC supply voltage as well as the BER performance of their serial channel, bringing multiple analysis domains together in a comprehensive design environment. This session will show how you can accurately simulate the DC power supply performance using HyperLynx PI, then make more accurate BER predictions using HyperLynx FastEye(tm), allowing you to create more predictable and successful SERDES designs in much less time.
Steve McKinneyTechnical Marketing Engineer, Mentor Graphics
Steve McKinney is a technical marketing manager for Mentor Graphics Corporation. He is responsible for supporting Mentor's signal integrity and EMC solutions and providing technical expertise to Mentor's customers and application engineers. Steve received his BSEE and MSEE with emphasis on microwave circuit design from North Carolina State University.
4:00 pm - 4:20 pm
Chip Head Video Contest Finalist Screening
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Come see this special screening of the top 3 Chip Head Video Contest finalists and cast your vote to determine this year's winner! |
4:30 pm – 4:50 pm
An IEC Publications Reading
Intellectual Property for Electronic Systems: An Essential Introduction
Kathy Werner
IP Strategy and Business Manager,
Freescale Semiconductor,
President, VSI Alliance
5:00 pm - 5:20 pm
Chip Head Video Contest Finalist Screening
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Come see this special screening of the top 3 Chip Head Video Contest finalists and cast your vote to determine this year's winner! |
5:30 pm – 5:50 pm
An IEC Publications Reading
Power Distribution Network Design Methodologies
Barry Williams, Sun Microsystems
Larry Smith, Altera
Steve Weir, TeraSpeed
Bruce Archambeault, IBM
1:30 pm - 1:50 pm
Chip Head Video Contest Finalist Screening
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Come see this special screening of the top 3 Chip Head Video Contest finalists and cast your vote to determine this year's winner! |
2:00 pm – 2:20 pm
TecPreview Presentation
Learn about the latest quality IP
A global community of over 21,000 users go to ChipEstimate.com to search for the most up to date IP and have collectively performed over 80,000 chip estimations. We'll show how chip designers, architects, and managers can now go to one integrated site for learning about available IP, viewing datasheets, and exploring IP in the context of their chip design.
The ChipEstimate.com chip planning portal is an ecosystem comprised of over 200 of the world's largest IP suppliers and foundries. These companies all share in the common vision of helping the worldwide electronics design community achieve greater profitability and success.
Sean O'Kane
Marketing Director,
Chip Planning Solutions Organization
ChipEstimate.com
3:00 pm - 3:20 pm
Chip Head Video Contest Finalist Screening
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Come see this special screening of the top 3 Chip Head Video Contest finalists and cast your vote to determine this year's winner! |
3:30 pm – 3:50 pm
TecPreview Presentation
IC Low Power Planning and Estimation
How are you going to meet your IC power budget? Learn how early power estimation and exploration can help you achieve your power goals while simultaneously balancing functionality, performance, and cost. This TecPreview will provide a live demonstration of the Cadence InCyte Chip Estimator where you will witness pre-RTL power estimation for a 65 nm SoC design. The demo will include architectural power 'what-if' analysis, creation of a power plan and automatic generation of the Common Power Format (CPF).
Buda Leung
Sr. Technical Leader
Cadence Design Systems
4:00 pm – 4:20 pm
ChipEstimate.com TecPreview Presentation
5:00 pm – 5:20 pm
ChipEstimate.com TecPreview Presentation
6:00 pm - 6:20 pm
Chip Head Video Contest Awards Ceremony
