Cost is driving technologies such as SiP to emerge as a mainstream product. But SiP and other advanced methods such as TSV and silicon substrate for packaging are blurring the boundary between IC foundry and package providers. Who owns the responsibility of providing a unified SiP solution to both IC and system designers? Will these new technologies require foundries and package providers to deepen collaboration or become competitors? At the same time, the IC providers and system design houses are also facing conflicting drivers. IC designers need to differentiate through technology leadership such as performance, functionality, and integration, while system houses need to reduce cost. Addressing these needs require a co-design methodology that enables early system prototyping for cost reduction, while leveraging the advanced technologies. Foundries and package providers own the responsibility of facilitating the co-design flow for IC and system designers, but are they? This panel will discuss the challenges faced by IC and system designers on reaping the benefits of SiP technology and what foundries and package providers are doing to make SiP a reality.

	Dian Yang Senior Vice President, Product Management Apache Design Solutions	Prior to joining Apache, Dr. Yang co-founded InnoLogic Systems, a provider of formal verification solutions for full-custom designs. InnoLogic was acquired by Synopsys in 2003, where he continued to lead the adoption, integration, and advancement of the InnoLogic products as a senior director in the implementation business unit. Previous to InnoLogic, he held various management positions in SGI/MIPS, LSI, and Avant. Dr. Yang has extensive experience in development and management of EDA software, including memory compilers, static timing tools, DFT, and functional verification solutions.

Moderator Ron Wilson Senior Editor EDN

Mr. Wilson's experience includes starting as a design engineer for Tektronix, then landing happily at Computer Design Magazine in the mid-1980s. From there he moved to EE Times and was briefly involved with ISD Magazine. Mr. Wilson's interests are system design based on highly-integrated ICs, the interaction of chip and software engineering and the future of design practice in the electronics community.

Nozad Karim Vice President of Application Engineering and Characterization Amkor

Mr. Karim has been with Amkor since 1997 and leads worldwide electrical, thermal, and mechanical engineering teams. He has nearly 27 years experience working with semiconductor packaging, system in package, and circuit and system designs for digital, analog, and RF/microwave applications.

Walter Ng Vice President, Design Enablement Alliances Chartered Semiconductor Manufacturing

Mr. Ng is responsible for identifying, developing and executing customer and partner alliances that advance the adoption of Chartered’s solutions for the leading-edge and mainstream technology nodes. He has led the company’s collaboration with IBM to define the strategy and implementation of the solutions and third-party network for the industry’s first common design enablement platform.

Judy Priest Distinguished Engineer Cisco

Dr. Priest has more than 20 years in the area of signaling technology, circuit, interconnect, and timing specification, design, and verification in chip and system applications. She is recognized as an expert in the field. She previously worked at DEC, HP, SGI, and Atheros Communications.

Andrew T. Yang Chief Executive Officer Apache Design Solutions

Dr. Yang co-founded Apache in 2001 and has been an active entrepreneur and investor in EDA since 1993. Dr. Yang received his Ph.D. from the University of Illinois, Urbana-Champaign in 1989 and was a tenured professor at the University of Washington from 1989 to 1996.

Phil Yastrow Product Technology Manager, ASIC Product Division Avago

Mr. Yastrow is director of Product Technology for the ASIC Product division of Avago Technologies. He started as an IC designer with HP in 1985. He has since held several positions in sales, marketing, and R&D. Over the last 10 years, HP’s ASIC division was spun out into Agilent and then Avago.