Brahim Bensalem, Senior Hardware Engineer, Intel
Sanjeev Gupta, Signal Integrity Specialist, Agilent Technologies
Lihua Wang, Software Design Engineer, A/RF Simulation, Agilent Technologies

In the past, automated optimization was part of RF/MW designs and was not commonly used in digital interconnect designs because of lack of availability in commonly used EDA tools. With continuing increases in platform interconnect complexities, the risk of missing opportunities, by either over-designing or using a poor design, is getting higher and higher. This paper will address the use of optimization techniques to achieve better interconnect performance for digital systems and optimize parameters such as eye diagram and BER performance. The optimization opens up the new possibility in measurement-based interconnect modeling. This paper addresses various optimization algorithms and their merits in interconnect optimizations. Design and optimization of complex DDR2 channels are presented. Simulation results and post-silicon data are compared.