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7-WA2
Methodology of Characterizing Chip-to-Chip Serial Interconnects with AC Coupling Capacitors
Wednesday, February 4 | 9:20 am – 10:00 am

Wheling Cheng, Technical Leader, Cisco Systems
LuisSergio Boluna, Technical Leader, Cisco Systems
John Fisher, Manager, Hardware Engineering, Cisco Systems
Gurpreet Hundal, SI engineer, Cisco Systems
Susmita Mutsuddy, SI engineer, Cisco Systems

This paper summarizes a methodology of characterizing chip-to-chip serial interconnects with AC coupling capacitors. The emphasis is on the characterization of impedance discontinuities caused by the vias that connect the inner routing layer to the top layer, where the capacitors are mounted. The work is based on measurement data from a test vehicle, which includes the individual PCB structure with the mounted capacitors as well as full channel structures. The measured full-channel S-parameters will be used with transmitter and receiver models to perform time domain simulations to study the impacts of the design parameters.
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