Schedule
7-WA1
Crosstalk in High-Speed Via Pin Fields Including the Impact of Power Distribution Structures
Wednesday, February 4 | 8:30 am – 9:10 am
Gustavo Blando, Principal Engineer, Sun Microsystems
Jason Miller, Senior Staff Member, Sun Microsystems
Istvan Novak, Distinguish Engineer, Sun Microsystems
Douglas Winterberg, Signal Integrity Engineer, Sun Microsystems
Carefully managed escape via allocation in pin-field arrays are often necessary in order to avoid excessive crosstalk in high-speed interconnects. Vias inject energy into cavities; these cavities in turn transfer energy to the surrounding medium, such as power-plane openings, power-ground cavities, and ultimately other signal vias, producing unwanted crosstalk. In this work, we’ll study how this coupling mechanism occurs, assuming imperfect plane pair cavities. We will also show how ground and, more importantly, the plane connections of power vias, might affect and in some cases may amplify crosstalk levels.