David Brunker, Technical Fellow, CPD, Molex
Joseph Comerci, Engineering Manager, Molex
Tim Gregori, Product Engineer, Molex
Mike Neumann, PCB Engineer, Molex
Jason Squire, Senior Product Engineer, Molex

Current I/O functions reflect the need to move high-speed serial information at very high data rates across a number of boards. A solution set is explored incorporating a coplanar interface with multiple parallel lanes operating up to 25 Gbps with NRZ encoding. Coplanar interconnect systems are often characterized by high crosstalk and poor return loss performance. This has regularly limited their use above 6 to 8 Gbps, particularly when simple and economical approaches are considered. This paper explores differential interface geometries using measurement and modeling methods to define operational limits to 25 Gbps. Both connector and PCB structures are modified to form a decision matrix for performance optimization. Design practices leading to 25 Gbps system solutions and meeting simultaneous crosstalk and return loss targets will be proposed.