Moises Cases, Distinguished Engineer, STG, IBM
Bhyrav Mutnury, Senior Engineer, IBM
Nam Pham, Senior Engineer, IBM
Navraj Singh, Electrical Design Engineer, IBM

High-performance, high-speed server designs are becoming complex with the every increasing demand for bandwidth. Careful choice of channel design parameters for electrical modeling and analysis is becoming a challenge. Often, the electrical design space is too large for a brute force analysis. Statistical techniques such as Monte Carlo take too many simulations to achieve the necessary confidence level and are not efficient in finding the best and worst case corners. This paper introduces statistical and evolutionary algorithms for electrical design optimization. Statistical techniques such as orthogonal arrays and evolutionary techniques such as genetic algorithms and swarm intelligence are introduced and compared against their advantages and limitations. High-speed multi-drop interfaces such as DDR–2 and DDR–3 and serial interfaces such as PCIe and gigabit Ethernet are used as test cases to show the efficiency of the proposed evolutionary techniques.