Andres Takach, Chief Scientist, Mentor Graphics
David Burnette, Development Engineer, Mentor Graphics
Michael Fingeroff, Technical Marketing Engineer, Mentor Graphics

Recent years have seen an increased adoption of a design methodology that generates optimized RTL directly from ANSI C++ specifications using high-level synthesis (HLS). In addition to reduced design times, an important benefit that designers seek when using an HLS–based design methodology is the ability to reuse the same C++ specifications for many applications. This paper outlines the requirements for a comprehensive C++ IP design and reuse methodology, which includes fast bit-accurate data types, design parameterization using C++ templates, flexible interface synthesis, and an automated verification environment that provides functional and formal verification.

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