Kathryn Kranen, Chief Executive Officer, Jasper Design Automation
Homayoon Akhiani, Principal Engineer, Jasper Design Automation
Yann Antonioli, Program Director, Jasper Design Automation
Craig Deaton, Principal Methodology Engineer, Jasper Design Automation
Norris Ip, Director, Engineering, Jasper Design Automation
Lawrence Loh, Director, Application Engineering, Jasper Design Automation
Rajeev Ranjan, Chief Technology Officer, Jasper Design Automation

The increasing complexities of modern SoCs and short time-to-market requirements have made the efficient reuse of in-house and third-party IPs more critical than ever before. Given that most IPs require some degree of modification before reuse, it is critical to address the root problem of efficient comprehension, modification, and reverification in IP reuse.

This paper describes a tool and methodology solution that consists of putting the IP through an activation process. The resulting database is then used by the IP consumer with an analysis tool that allows both dynamic association of the relationship among available data and on-the-fly generation of timing diagrams for the modified IP. The tool and the methodology are illustrated on a memory-controller IP block.

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