Tim Hoang, Senior Design Manager, Altera
Kazi Asaduzzaman, Senior Member of Technical Staff, Altera
Sergey Shumarayev, Director of Engineering, Altera
Mian Smith, Senior Member of Technical Staff, Altera
Leon Zheng, Design Engineer, Altera

In most applications, PLLs are configured to operate with one particular known input frequency and generate an output clock signal by multiplying or dividing the input. In applications such as plug-and-play and advanced video applications, where the input frequency is unknown to system designers, the PLL is still required to operate correctly. This paper presents an innovative apparatus to assist PLLs in adapting to any input frequency and generating a pre-determined output frequency.