Ricardo Maltione, Senior Design Engineer, RASG, Freescale Semiconductor
Alfredo Olmos, Senior IC Design Engineer, Freescale Semiconductor
Andre Vilas Boas, Analog Design Engineer, Freescale Semiconductor
Eduardo Ribeiro da Silva, Analog Design Engineer, Freescale Semiconductor

Theoretical analysis and practical design guidelines for output buffer implementation under variable-power-supply I/O interfaces, including adaptive slew-rate control, are presented in this paper. Traditional approaches adopted in these scenarios use area or jeopardize driver performance. However, by adapting output driver strength against supply voltage variations, it is possible to meet the slew-rate requirements as well as commit with electromagnetic interference compliance levels for a wide-supply voltage range. An output buffer designed using the geometric-load-slew factor methodology was proposed, designed, and fabricated using a 0.25 um SMARTMOS process technology.