Though the title might suggest that designers have a choice, in today’s increasingly dense electronic packaging, we many times do not have the freedom to avoid splitting power distribution planes. Many years ago, splits in planes were rare and were employed primarily to implement some intentional isolation between subcircuits. Such typical scenarios were the splits between analog and digital grounds or isolation between chassis and logic ground. Today the density of trace interconnects drives up layer count in PCBs and packages alike, and the power optimization creates more and more separate power domains. These two factors dictate that we have to reuse power distribution planes by splitting the planes in certain layers to serve multiple circuits. This, however, creates severe routing restrictions if we don’t want to cross the splits with signal traces or need to carefully weigh the possible negative consequences in signal distortion, increased crosstalk, mode conversion, and increased radiation and susceptibility. This panel brings together experts from the industry and academia to discuss the various tradeoffs to be considered by package and board designers.

Istvan Novak Distinguished Engineer, SPARC Volume Servers Sun Microsystems

Dr. Novak is engaged in the design and characterization of power distribution networks and packages for Sun servers. He creates simulation models and develops measurement techniques for power distribution. Dr. Novak has more than 20 years of experience with high-speed digital, RF and analog circuits, and system design. He is a fellow of IEEE for his contributions to the fields of signal integrity, RF measurements, and simulation methodologies.

Eric Bogatin President Bogatin Enterprises

Dr. Bogatin received his BS in physics from MIT and MS and PhD in physics from the University of Arizona in Tucson. He has held senior engineering and management positions at Bell Labs, Raychem, Sun Microsystems, Ansoft and Interconnect Devices. Dr. Bogatin has written four books on signal integrity and interconnect design and more than 200 papers. His latest book, Signal Integrity- Simplified, was published in 2004 by Prentice Hall. He has taught more than 4,000 engineers in the last 20 years. Many of his papers and columns are posted on the www.BeTheSignal.com web site.

Bruce Archambeault Distinguished Engineer IBM

Dr. Archambeault leads EMC tool development and use on a variety of products. He has authored or co-authored a number of publications on computational electromagnetics applied to real-world EMC problems and authored the book PCB Design for Real-World EMI Control. Dr. Archambeault is a member of the board of directors of the IEEE EMC Society and past board member of the ACES.

Dr. Madhavan Swaminathan Professor Georgia Tech

Dr. Swaminathan is the Joseph M. Pettit Professor in Electronics in the School of Electrical and Computer Engineering. He was the deputy director of the Microsystems Packaging Research Center, Georgia Tech from 2004 - 2008. Dr. Swaminathan is the co-founder of Jacket Micro Devices, a leader in integrated RF modules and substrates for wireless applications. Prior to joining Georgia Tech, he was with IBM working on the packaging for supercomputers. He is the author of more than 300 journal and conference publications, holds 15 patents, and is the author of two books entitled "Power Integrity Modeling and Design for Semiconductors and Systems."

Michael Steinberger, Ph.D. Distinguished Member, Technical Staff SiSoft

Michael Steinberger, Ph.D., has over 29 years experience designing very high speed electronic circuits. Dr. Steinberger holds a Ph.D. from the University of Southern California, and has been awarded 7 U.S. patents. Before joining SiSoft, Dr. Steinberger led a group at Cray, Inc. performing SerDes design, high speed channel analysis, PCB design and custom RAM design. He drove development of methodologies and software at Cray used to successfully design and validate 6+ Gbps serial links.