Nick English, Vice President, Development, Si2
Dave Allen, Product Director, Atrenta
Qi Wang, Engineering Director, Cadence
Jerry Frenkil, Chief Technology Officer & Vice President, Research & Development, Sequence Design
Gary Delp, Distinguished Engineer, Platform Roadmap and Architecture, LSI
Dale Pollek, Senior Director, Product Marketing, Atrenta

Green technologies, including low power design, have been identified as critical areas for design flow improvement in IC and system design. This three hour workshop is intended to review the progress made to date in the areas of low power design formats and to expose and acknowledge the challenges remaining for full interoperability between those formats. Detailed presentations on advances in low power design understanding will be made at the workshop and specific areas of interoperability that remain will be addressed. Advances in Power Aware design flows and Low power design techniques will be presented and supporting documents and technologies will be made available. The workshop will conclude with a panel discussion on “What does interoperability mean?”. The goal of the workshop is to enhance industry understanding of the state of low power design capabilities today and the remaining challenges to full interoperability of low power design flows that will need to be addressed.