C. J. Clark, Chief Executive Officer, Intellitech

Can an FPGA configuration choice hurt the company’s bottom line? RAM–based FPGAs need on-board methods to program a design into the FPGA at power-up. Years ago, the primary solution was to add a specialized FPGA PROM to the PCB for this purpose. FPGAs now have eight or more ways to load design bits using external NOR FLASH, serial FLASH, a CPU, JTAG, or other specialty devices. Complexity has increased as the solution must support multiple design versions, encryption, gray market protection, Trojan protection, fail-safe updates, mixed FPGA families, and more. This paper explores the methods and costs to the company.