Vishram Pandit, Senior Analog Engineer, Intel
Woong Hwan Ryu, Manager, Intel

For a high-speed bus operating at multiple Gbps, a low-margin problem is observed in the laboratory. A systematic approach is taken to root-cause the problem. Frequency domain VNA measurements are taken for the worst-case bit. The self-impedance of the channel and the transfer impedance of the channel are analyzed. Self-impedance clearly showed the resonance at the third harmonic of the operating frequency. The transfer impedance illustrated the crosstalk coupling around that frequency. The simulation model is optimized and correlated with lab measurements. Different enablers to mitigate resonance effect are evaluated in simulations and recommended for implementation.