Xiaoxiong Gu, Research Staff Member, T.J. Watson Research Center, IBM
Francesco de Paulis, University of L’Aquila
Renato Rimolo-Donadio, Technische Universität Hamburg-Harburg
Ketan Shringarpure, Missouri Institute of Science and Technology
Yaojiang Zhang, Institute of High Performance Computing
Bruce Archambeault, Distinguished Engineer, Systems and Technology Group, IBM
Sam Connor, Senior Engineer, Systems and Technology Group, IBM
Young H. Kwark, Research Staff Member, T.J. Watson Research Center, IBM
Mark B. Ritter, Research Manager, T.J. Watson Research Center, IBM
Jun Fan, Assistant Professor, Department of Electrical and Computer Engineering, Missouri University of Science & Technology
Christian Schuster, Professor, Institute of Electromagnetic Theory, Technische Universität Hamburg-Harburg

High-speed PCBs can be extremely complex, with a large number of via structures and transmission lines. Rapid, real-time analysis of on-board, high-speed nets, including the non–TEM effects of vias, has been unrealistic. However, using a systematic, cascaded analytical approach, these high-speed nets can now be analyzed quickly enough to do design discovery and optimization during the pre-layout phase. The self-assembly of the cascaded link path using analytical models for each individual portion allows this analysis to be performed in real time, replacing the time-consuming traditional full-wave simulation techniques without losing accuracy.