Greg Edlund, Senior Engineer, Server Development, IBM
Jay Diepenbrock, Senior Technical Staff Member, IBM
Mike Resso, Signal Integrity Measurement Specialist, Agilent

Contemporary supercomputers comprise clusters of nodes with a collective performance that depends strongly on data bandwidth across the interconnect fabric. This places cable assemblies squarely in the critical path to system performance. The accurate measurement and characterization of cable assemblies can make or break speed records. A fundamentally sound methodology of interconnect characterization includes proper error correction techniques in vector network analyzer–based physical-layer test systems. Since many digital design engineers are confused by variations in de-embedding, gating, and calibration processes, this paper will explain the differences between these techniques and demonstrate how they enable the ultra-fast hardware required by supercomputers.