Jason Miller, Senior Staff Engineer, Sun Microsystems
Gustavo Blando, Signal Integrity Staff Engineer, Sun Microsystems
Roger Dame, Senior Staff Engineer, Sun Microsystems
K. Barry A. Williams, Principal Engineer, Sun Microsystems
Istvan Novak, Distinguished Engineer, SPARC Volume Servers, Sun Microsystems

Power and/or ground splits frequently arise in real-world boards to manage the various constraints placed on the board designer. As a consequence, signal traces can often be forced to cross these plane split boundaries or be routed in proximity to them. These trace routes may have a number of undesirable consequences on both signal integrity and power integrity. In this paper, we will examine the impact of split planes using both measured and simulated data.