Praveen Pai, Power Delivery Engineer, Intel, India
Julius Delino, Power Delivery Engineer, Intel
Ramaswamy Parthasarathy, Power Delivery Engineer, Intel, India

PDN design flow includes optimization of the given network to meet a target that could be in frequency domain as Z(f) or in time domain as noise or jitter margin. Optimization faces many constraints such as keep out zone limit, narrow power shapes, and mesh-like structure on the power planes. This paper provides a novel methodology to address these constraints, insights into how a mesh can significantly help a PDN and its limitations, and simulation and lab data for designing a good reference plane.