Schedule
10-TA1
FPGA/ASIC Pre-Driver PDN SSN and Its Impact on SSJ
Tuesday, February 3 | 8:30 am – 9:10 am
Hui Liu, Senior Packaging Design Engineer, Altera
Xiaohong Jiang, MTS, Altera
Hong Shi, Manager, Packaging Design Engineer, MTS Packaging Technology, Altera
This paper describes the SSN behavior of FPGA/ASIC pre-driver PDN excited by different kinds of SSO signal patterns. The physics behind PDN resonance is explored. The quantitative relationship between pre-driver PDN resonant frequency and signal-toggling frequency is established to find the SSO signal pattern that generates the worst PDN SSN. This paper shows how and why OPD can greatly reduce pre-driver PDN SSN as well. Additionally the relationship between pre-driver PDN SSN and SSJ and a method for finding the worst SSJ due to PDN SSN effect is discussed.