TF-MA3
Chip, PCB, and Connector Technologies for Meeting Today's and Tomorrow's 10+Gb Signaling Requirements — a Report on Current Trends and Future Road Maps
Monday, February 4 | 9:00 am – Noon
Dana Bergey, Signal Integrity Manager, FCI
Brad Booth, Senior Principle Engineer, AMCC | President, Ethernet Alliance | Treasurer, IEEE 802.3
Stefaan Sercu, Signal Integrity Manager, FCI Electronics
Franz Gisin, Director of Backplane Design Technology and Signal Integrity Design, Sanmina-SCI
Brad Booth, Senior Principle Engineer, AMCC | President, Ethernet Alliance | Treasurer, IEEE 802.3
Stefaan Sercu, Signal Integrity Manager, FCI Electronics
Franz Gisin, Director of Backplane Design Technology and Signal Integrity Design, Sanmina-SCI
This tutorial reviews the evolution of chip speeds and the advances in PCB and connector technologies used to enable historical increases in data rates and presents road maps to the next generation of bandwidth enhancements. Industry experts representing each part of a high-speed link will describe advances in their specific technologies that now enable systems to meet current 10 Gb requirements, including the IEEE 802.3ap Ethernet standard. The speakers will then present road maps for each discipline that outline the future advances being worked on to enable additional increases in throughput by further optimizing density and/or speed.