There is a widespread need within the communications industry to understand and quantify high-speed channels to enable effective technology and product advancement. Operation at and above 10 Gbps requires clear and precise metrics and their broad understanding. An informed view of advanced high-speed serial channel metrics will be presented, highlighting methodology and implementation using leading industry tools.

• StatEye 4 and 5: A comparative overview of the pulse-based version 4 and step-based version 5.
• Backplane Ethernet channel model (IEEE 802.3ap(TM)-2007): Guidelines for channel performance using frequency-domain templates, including insertion loss deviation (ILD) and insertion loss to crosstalk ratio (ICR).
• WDP: An IEEE 802.3.aq™ standard overview defining the transmitter and waveform dispersion penalty (TWDP) to account for channel loss and equalization strength as part of a compliance metric.
• Empirical analysis of channel margin: A hardware-based approach that consists of deliberate introduction of controlled degradation into channel performance parameters and subsequent correction of compromised channels using an active silicon device addressing physical-link performance options.

David Brunker Technical Fellow Molex Incorporated

Mr. Brunker is involved in defining high-speed product direction and maintaining internal communications of associated technologies. He has developed products in the areas of shielded and high-speed connectors, high-speed cable and backplane transmission links, and fiber optics. He has contributed to various standards organizations and MSAs, including IEEE 1394a and 1394b, DVI, VESA, EVC, SSA, and OIF. He holds more than 50 U.S. patents. He received his B.S. in psychology with emphasis in psychoacoustics from the University of Illinois at Urbana-Champaign.

Adam Healey Consulting Member of Technical Staff LSI Corporation

Mr. Healey is engaged in the development of high-speed serial interface solutions. He is a contributor to industry standards and recently served as chairman of the IEEE P802.3ap Task Force, chartered to develop the standard for Ethernet operation over electrical backplanes. Mr. Healey also served a technical committee chairman and vice president of technology for the Ethernet Alliance.

Gourgen Oganessyan Strategic Marketing Manager Quellan Inc.

Mr. Oganessyan works on developing technology strategies and applications for Quellan's lane-extender and crosstalk-cancellation products. Previously he was senior electrical engineer with Molex, Inc., where his work on signal integrity aspects and design of high-speed connector solutions included modeling and high-speed characterization of interconnects as well as design of reference backplane architectures and participation in OIF and IEEE 802.3 industry forums. Mr. Oganessyan has a master's degree in theoretical physics from Yerevan State University in Armenia and a master's degree in applied optics from University of North Carolina - Charlotte.

Pravin Patel Senior Engineer IBM xSeries Server Development

Mr. Patel is involved in defining product architecture, creating product strategies, and time and frequency domain SI analyzing/simulating high-speed serial links. He has received an Outstanding Technical Achievement Award, a Corporate Award, and held several U.S. patents. Mr. Patel has authored or co-authored a number of papers in EPEP, ECTC, and DesignCon conferences. He received a B.S. degree in electrical engineering from the New Jersey Institute of Technology in 1989.

Anthony Sanders Principal in System Engineering Infineon Technologies, COM Product Division

Mr. Sanders is responsible for the development of Infineon's first 10 Gbps products in CMOS. He has been with Infineon Technologies since 1996. Previously, he worked for Phoenix Technologies and GPT. He has written a number of papers and contributed to one book on the statistical analysis of electrical channels, statistical static timing analysis, and equalization techniques for band-limited systems. He is a founder of the Stateye open-source statistical analysis tool. Mr. Sanders was chair of the JEDEC FBDIMM2 Standard Link Signaling Task Group and the IEEE ad hoc on XAUI Jitter for 10Gigabit Ethernet and was editor of the OIF's Common Electrical I/O (CEI) standard.