At the same time, government regulations and recent publications on environmental effects, variation of conductive losses due to various copper-foil types, and degradation of high-speed signals due to glass-weave effects are all indications that the cost-effective solutions have their specific challenges. Practicing signal integrity engineers know that the specification of high-speed traces is not straightforward: trace impedances and their loss characteristics depend on multiple parameters in the board stackup and layout. If the board specification tightly controls all of the possible parameters, the result is repeatable, but very costly and may yield different results if built at different suppliers. This panel discussion brings together experts from the industry to discuss the latest trends and options.

Istvan Novak Distinguished Engineer Sun Microsystems

In addition to the signal integrity system design of high-speed serial and parallel buses, he is engaged in the methodologies, designs, and characterization of power-distribution networks and packages for workgroup servers. He has 30 years of experience with high-speed digital, RF, and analog circuit and system design and has 22 patents. He is a fellow of the IEEE for his contributions to the signal integrity and RF measurement and simulation methodologies.

Karl J. Bois Master Engineer Hewlett-Packard, Microelectronics Support Technologies

Dr. Bois' main functions include signal integrity analysis of next-generation computer chip packages and PCB, development of modeling techniques for transmission line structures, and implementation of test benches for experimental verification. He has authored or co-authored more than 40 journal publications, conference presentations and proceedings, technical reports, and overview articles. He has also been granted more than 20 patents, with more than another 20 pending. He received his B.Sc. and M.Sc. degrees from the Electrical Engineering Department at the Université Laval in Québec, Canada. He obtained his Ph.D. degree from the Electrical and Computer Engineering Department at Colorado State University.

Joseph Diepenbrock Senior Technical Staff Member, Interconnect Qualification Engineering Department IBM

Mr. Diepenbrock is currently working on the electrical testing and modeling of connectors and cables. He has worked in a number of areas at IBM, including bipolar and CMOS IC design, analog and digital circuit design, backplane design and simulation, and network hardware and server product development. Mr. Diepenbrock received the Sc.B. and M.S. degrees in electrical engineering from Brown University in Providence, Rhode Island, and Syracuse University in Syracuse, New York, respectively.

Franz Gisin Sanmina-SCI

Jeff Loyer Signal Integrity Lead, Enterprise Platforms and Services Division Intel

Mr. Loyer has authored articles on signal integrity for EDN and PCD&M magazines and has taught signal integrity classes both inside and outside Intel. He holds a Bachelor of Science degree in electrical engineering technology from Arizona State University in Tempe.

Scott McMorrow President Teraspeed Consulting Group

Mr. McMorrow is an experienced technologist with more than 20 years of broad background in complex system design, interconnect, and signal integrity engineering, modeling and measurement methodology, engineering team building, and professional training. He has a consistent history of delivering and managing technical consultation that enables clients to manufacture systems with state-of-the-art performance, enhanced design margins, lower cost, and reduced risk. Mr. McMorrow is an expert consultant and trainer in high-performance design and signal integrity engineering recognized worldwide.