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As part of the free Exhibits PLUS programming attendees are welcome to attend the following:
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Monday, February 4 |
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12:30pm – 1:30pm |
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Speaker:
Joachim Kunkel Vice President and General Manager
Synopsys
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4:45pm – 6:00pm |
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Technical Panel
Is Coverage the Best Metric for Verification Closure? Chairperson:
Faisal Haque Director of Engineering
QUALCOMM
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Chairperson:
Chris Loburg Senior Manager of Marketing
Tektronix
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Technical Panel
Understanding the Impact of 100 G Ethernet Chairperson:
Loring Wirbel Director and Senior Analyst, Market Intelligence Unit
EE Times
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Tuesday, February 5 |
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12:00pm – 12:30pm |
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Speaker:
Misha Burich Senior Vice President, Research and Development
Altera
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3:45pm – 5:00pm |
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Technical Panel
ASIC Verification Chairperson:
Gary Smith Founder and Chief Analyst
Gary Smith EDA
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Technical Panel
High-Speed PCB Traces: What Is Their Real Performance? Chairperson:
Istvan Novak Distinguished Engineer
Sun Microsystems
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Chairperson:
Lee H. Goldberg Senior Technology Editor
EN-Genius.com
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5:00pm – 6:30pm |
Reception on Exhibition Floor |
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Wednesday, February 6 |
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10:30am – 11:45am |
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Plenary Panel
Navigating the ASIC Manufacturing Landscape Chairperson:
Kazu Yamada Vice President and General Manager, Custom SOC Solutions Business Unit
NEC Electronics America
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12:00pm – 12:30pm |
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Speaker:
Rick Cassidy President
TSMC
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3:45pm – 5:00pm |
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Technical Panel
IP Standards — Where Do We Go from Here? Chairperson:
Jim Lipman Vice President, Client Services
Cain Communications
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Technical Panel
Advanced High-Speed Serial Channel Metrics Chairperson:
Dave Brunker Technical Fellow
Molex Incorporated
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Chairperson:
Vikram Jandhyala Executive Management, Founder, Chairman, and CEO
Physware
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5:00pm – 6:30pm |
Reception on Exhibition Floor |
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