Validation of today's complex, mixed-signal SoC creates new test-bench development challenges. Tools available on the market (e.g., Specman^TM) offer a good solution, but they lack support for actual chip testing. In this paper, we present a simulation environment we developed, addressing the challenges of both validating and testing a mixed-signal RF CMOS transceiver for the WLAN market. This environment is based on the free open-source Python language and relies on SystemC to interface with standard HDL simulators. Overall, this methodology allowed us faster validation and verification phases while delivering a working chip at first tapeout.