1-TP2
Methods for Configurable Hardware Design
Tuesday, February 5 | 2:50 pm – 3:30 pm
Craig Rawlings, Director of Marketing, Kilopass Technology
Platform chip architectures may incorporate configurable features and feature sets through various methods within a single monolithic chip that were previously impossible due to the absence of a high-density bulk CMOS-embedded NVM technology. With the availability of a high-density logic NVM technology that supports larger on-chip non-volatile memory sizes, an SoC's configuration information may be stored locally with configurable features more tightly integrated into the target chip's design. This paper discusses various methods for incorporating configurable features into the SoC enabled by the availability of resident logic NMV.






