1-THA3
Transaction Level Assertions in an Interface Definition Language
Thursday, February 7 | 10:40 am – 11:20 am
Dave Whipp, Verification Architect, NVIDIA
When modeling in multiple languages it is useful to define the interface to a module in a separate interface definition language. Simple scripts then generate port lists for verilog and C models. This paper describes how we built on an earlier IDL to add transaction-level assertions and test points that describe the patterns of behavior that are legal across various interfaces. These properties are then mapped into various models, including assertions in verilog and C. Having defined assertions at this level of abstraction, we are able to reuse them as we explore different structures and configurations of a design.






