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DesignCon 2007
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TecPreviews
Tuesday, January 30, 2007
2:00 pm – 2:20 pm
Infusing Speed and Visibility into ASIC Verification
2:30 pm – 2:50 pm
Incorporating System Noise and Crosstalk into Serial Link Analysis
3:00 pm – 3:20 pm
Improving the Accuracy of Multi-Gigabit Signal Integrity Measurements
4:00 pm – 4:20 pm
Design and Application of an Optical Backplane Connection System
4:30 pm – 4:50 pm
5 new tools to meet the challenges of PCIe Gen2, SATA and 802.3 jitter analysis
5:00 pm – 5:20 pm
Overcoming the Limiting Factors of FPGAs: Power Consumption and Cost
Wednesday, January 31, 2007
2:00 pm – 2:20 pm
Serial Data Network Analysis by Tektronix: How to more accurately characterize high-speed serial channel performance
2:30 pm – 2:50 pm
Ultra Low Phase Noise Crystal Oscillator Solutions up to 2.5 GHz
3:00 pm – 3:20 pm
Capture – An introduction to OrCAD Capture by CA Design
4:00 pm – 4:20 pm
Jitter Measurements: A revolutionary new tool for the masses

If your organization is interested in presenting a TecPreview paper and demonstration at DesignCon please act quickly as space in this exclusive program is limited! Contact Christine Paplaczyk at +1-312-559-4616 or cpaplaczyk@iec.org to reserve your space in the TecPreview Exhibitor Program today!

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