Carbon Design Systems dramatically reduces time to market by enabling complex SoC architectures and the accompanying software to be validated months before silicon implementation. With Carbon, it's easy to generate system models from your last design RTL, legacy and third party IP. Model generation is easy—Verilog and VHDL are compiled into a performance optimized 'C' object. Transaction level interfaces are added through Carbon's library of bus transactors. Carbon has a transparent integration to popular system-level simulators from ARM, MIPS, CoWare, and OSCI. "Carbonized" models have 100% visibility and cycle-accuracy necessary for profiling and concurrent SW/HW debug.
TECHNOLOGIES ON DISPLAY
Carbon's SOC-VSP software is the first virtual system prototyping solution that combines the power of simulators such as ARM® RealView® SoC Designer with Carbon's high-performance hardware models. Finally, a hardware-accurate, soft-model of a SoC that can be rapidly assembled and functionally validated on an engineer's desktop months before silicon. System architects can profile a SoC with end-to-end cycle accuracy including Verilog® and VHDL hardware designs. Firmware engineers can set hardware breakpoints, run to a hardware event, and peek/poke registers through Carbon's intuitive interface. The project lead can tape-out on time, with confidence that the software and silicon will work the first time.
Highlight
Carbon will be showcasing its Replay technology that allows software developers to iterate through previously validated code quickly, without rerunning the underlying hardware models. This novel approach records incoming bus traffic and response during an initial simulation and saves the model state information at specified intervals. During the next software execution iteration, the Carbon model is stimulated from other components in the system and replays its saved response at very high speed until the last valid checkpoint, at which time the model restores its state and simulates normally from that point forward. Replay mode will detect any inputs that don't match in sequence or value, and automatically roll back to the previous checkpoint to ensure correct operation.
