Engineers will present solutions to some of the toughest challenges in today's signal integrity margin and compliance testing: (1) Equalize transmitter and backplane measured signals to show real "eye opening" for 802.3ap; (2) Accurately capture SSC waveforms for SATA and generate adjustable center-spread SSC for SAS Gen3; (3) Analyze duty cycle distortion of sub-rate clocked systems; (4) Measure 1.5 MHz low pass filter integrated jitter spectrum for PCIe Gen2; (5) Generate differential pre-emphasis signals from a single channel BERT. The session includes real examples followed by an opportunity to ask questions and get answers from experts.
Reminder: "One needs five cards to get a winning hand. This may just be one of them."
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Bent Hessen-Schmidt
Vice President Business Development
SyntheSys Research, Inc.
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Bent Hessen-Schmidt is V.P. Business Development at SyntheSys Research, Inc., the makers of BERTScope. Bent is responsible for strategic alliances as well as applications of test equipment for signal integrity analysis, including jitter generation and measurements of electrical high speed data communications devices. He is also a participating in meeting or work groups within the PCI-express, Serial ATA and FB-DIMM standards. Bent can be reached at bhessen@bertscope.com
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