There is little argument by IP vendors or integrators that the semiconductor industry needs to employ some type of IP encryption mechanism to protect valuable semiconductor IP. However, there are many questions as to who should supply the encryption technology and how it should be used.

This panel will address several questions surrounding the development and implementation of encryption technology for protecting IP, including the use of proprietary versus standard IP encryption schemes, how to evaluate the value of available encryption methods, how to embed encryption implementation into an SoC design flow, the cost of encryption implementation, and how to avoid burdening users with new design obstacles as a result of encryption use.

Bryan Lewis Director and Chief Analyst Gartner Dataquest

Mr. Lewis joined Dataquest in 1985 and founded Dataquest's ASIC/SOC/FPGA research. He has responsibility for tracking and evaluating market movements, forecasting markets, and tracking technology trends. He is a key speaker at numerous conferences and consults with a wide range of worldwide clients. Mr. Lewis received a Bachelor of Science degree in marketing from the University of Oregon.

Robert C. Aitken ARM Fellow ARM Holdings plc

Dr. Aitken's areas of responsibility include low-power design, design for testability, and design for manufacturability for the Artisan® family of ARM® physical IP. He has given tutorials and short courses on several subjects at conferences and universities worldwide. He has published more than 50 technical papers and has twice received the best paper award from the International Test Conference. Dr. Aitken is a senior member of the IEEE and a former associate editor of IEEE Transactions on Computer-Aided Design. He also was general chair of the 2005 International Test Conference. He holds a Ph.D. degree from McGill University in Canada.

Jean Bou-Farhat Vice President, IP Solutions LSI Logic

Mr. Bou-Farhat is responsible for the development of complex IP solutions and the management of a third-party IP portfolio for custom solution products at LSI Logic. He also represents his company on the boards of directors of both VSIA and the SPIRIT Consortium. Prior to joining LSI Logic, Mr. Bou-Farhat has held senior management positions with responsibilities involving CoreWareŽ technology, high-speed IO interface engineering and memory, and mixed-signal design methodology.

Michael Horne Group Marketing Director, Industry Alliances Cadence Design Systems

Mr. Horne is responsible for managing the company's IP and EDA alliances programs and driving strategic business development and collaboration. Prior to joining Cadence in 2005, he was the founder of Verifica LLC, an industry consultancy in IP and EDA strategic marketing and business development. Prior to forming Verifica, Mr. Horne was founder and chief executive officer of Qualis Design Corporation where he led a U.S. and European team of verification and IP experts to develop the industry's first multi-language, plug-and-play VIP system modeling platform. Qualis was acquired by Synopsys in 2003. Mr. Horne established his roots in engineering as a system designer of DSP-based video, audio and spectral analysis products at Tektronix.

Bill Martin General Manager, Intellectual Property Division Mentor Graphics

Mr. Martin has more than 25 years of experience in consulting, product design, and project management. He joined Mentor in 2000 as the U.S. director of Mentor Consulting and had previously worked for Synopsys and VLSI Technology. Mr. Martin has an M.B.A. in marketing and finance from the University of Texas at Dallas and a B.S. in computer engineering from the University of Illinois at Urbana-Champaign.

Jim Robinson Vice President of Corporate Applications Synplicity

Mr. Robinson is responsible for overseeing Synplicity's Corporate Applications organization and the Development organizations for the ASIC verification and FPGA debug product lines. He is also responsible for Synplicity's Technical Support Organization, which has achieved high user satisfaction ratings in the EE Times Annual Electronic Design Automation Branding Study since 2004. When Mr. Robinson joined Synplicity in 1997, he was the third employee in the Corporate Applications Engineering Department; since that time, he has held positions at all levels of the organization. In 2000, Mr. Robinson relocated to India, where he successfully established and managed Synplicity Software India Pvt. Ltd.

Mobashar Yazdani Senior Engineer/Scientist, GS&P, Imaging and Printing HP

Mr. Yazdani is in HP's Global Sourcing group supporting ASIC technology acquirement and development for HP Imaging and Printing groups worldwide. Prior, he was principal scientist in HP procurement for assessment of silicon providers and managed the ASIC/ASSP technology center in HP supply chain operations for a number of years. He started at HP in 1988 on the design of its first generation of CMOS RISC processors and on various ASICs for the HP enterprise computer line."